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New Design Based Metrology for Fast Detection of Crucial Lithographic Defects

Japanese Journal of Applied Physics, 2011-06, Vol.50 (6), p.06GB11-06GB11-5

2011

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Statistical retention modeling in floating-gate cell: ONO scaling

2009 IEEE International Reliability Physics Symposium, 2009, p.887-890

2009

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Investigation of charge loss mechanisms in planar and raised STI charge trapping flash memories

2010 International Conference on Simulation of Semiconductor Processes and Devices, 2010, p.233-236

2010

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IEEE_Xplore

Compact process model of temperature dependent amorphization induced by ion implantation

2010 International Conference on Simulation of Semiconductor Processes and Devices, 2010, p.197-200

2010

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IEEE_Xplore

Compact process and layout aware model for variability optimization of circuit in nanoscale CMOS

2010 International Conference on Simulation of Semiconductor Processes and Devices, 2010, p.141-144

2010

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IEEE_Xplore

Efficient characterization and suppression methodology of edge effects for leakage current reduction of sub-40nm DRAM device

2010 International Conference on Microelectronic Test Structures (ICMTS), 2010, p.34-37

2010

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IEEE_Xplore

Extraction of Electron Band Mobility in Amorphous Silicon Thin-Film Transistors

Japanese Journal of Applied Physics, 2012-02, Vol.51 (2), p.021402-021402-3

2012

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Extraction of Electron Band Mobility in Amorphous Silicon Thin-Film Transistors

Japanese Journal of Applied Physics, 2012-02, Vol.51 (2R), p.21402

2012

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P-141L: Late-News Poster: Characterization of Physical Parameter-Based Reliability on the Negative Bias Illumination Stress with Wavelength-Dependence in Amorphous Silicon Thin-Film Transistors

SID International Symposium Digest of technical papers, 2012-06, Vol.43 (1), p.1133-1136

2012

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New Design Based Metrology for Fast Detection of Crucial Lithographic Defects

Japanese Journal of Applied Physics, 2011-06, Vol.50 (6S), p.6

2011

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P-12: 3-D TCAD Simulation for Describing Intrinsic Fluctuations in Polycrystalline Silicon Thin Film Transistors

SID International Symposium Digest of technical papers, 2016-05, Vol.47 (1), p.1162-1164

2016

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A Unified Statistical Model for Inter-Die and Intra-Die Process Variation

2005 International Conference On Simulation of Semiconductor Processes and Devices, 2005, p.131-134

2005

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IEEE_Xplore

A Unified Compact Model of the Gate Oxide Reliability for Complete Circuit Level Analysis

2007 IEEE International Electron Devices Meeting, 2007, p.549-552

2007

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IEEE_Xplore

SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design

8th International Symposium on Quality Electronic Design (ISQED'07), 2007, p.475-480

2007

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IEEE_Xplore

EMI analysis of the LCD panel considering the display driver IC operations

IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005, 2005, p.225-228

2005

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IEEE_Xplore

The Statistical Failure Analysis for the Design of Robust SRAM in Nano-Scale Era

9th International Symposium on Quality Electronic Design (isqed 2008), 2008, p.369-372

2008

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IEEE_Xplore

A fast lithography verification framework for litho-friendly layout design

Sixth international symposium on quality electronic design (isqed'05), 2005, p.169-174

2005

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IEEE_Xplore

Analysis for complex power distribution networks considering densely populated vias

Sixth international symposium on quality electronic design (isqed'05), 2005, p.208-212

2005

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IEEE_Xplore

Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis

Fourth International Symposium on Quality Electronic Design, 2003. Proceedings, 2003, p.344-347

2003

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IEEE_Xplore

A new fast and accurate method of extracting the parasitics of multi-layer packages

Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710), 2003, p.189-192

2003

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IEEE_Xplore

Two-Dimensional Raman Correlation Spectroscopy Study of thePathway for the Thermal Imidization of Poly(amic acid)

Bulletin of the Korean Chemical Society, 2003, 24(3), , pp.357-362

2003

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Control of drain induced barrier lowering in short channel poly-Si TFTs for AMOLED displays

2013 Twentieth International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD), 2013, p.203-206

2013

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Tenofovir rescue therapy for chronic hepatitis B patients after multiple treatment failures

World journal of gastroenterology : WJG, 2012-12, Vol.18 (47), p.6996-7002

2012

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Expression Pattern of the Hippo Pathway Effector TAZ in Cellular and Fibrotic Nonspecific Interstitial Pneumonia

Chinese medical journal, 2018-03, Vol.131 (5), p.626-628

2018

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A hybrid PPC method based on the empirical etch model for the 0.14/spl mu/m DRAM generation and beyond

Proceedings International Symposium on Quality Electronic Design, 2002, p.143-147

2002

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IEEE_Xplore

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New Design Based Metrology for Fast Detection of Crucial Lithographic Defects

Statistical retention modeling in floating-gate cell: ONO scaling

Investigation of charge loss mechanisms in planar and raised STI charge trapping flash memories

Compact process model of temperature dependent amorphization induced by ion implantation

Compact process and layout aware model for variability optimization of circuit in nanoscale CMOS

Efficient characterization and suppression methodology of edge effects for leakage current reduction of sub-40nm DRAM device

Extraction of Electron Band Mobility in Amorphous Silicon Thin-Film Transistors

Extraction of Electron Band Mobility in Amorphous Silicon Thin-Film Transistors

P-141L: Late-News Poster: Characterization of Physical Parameter-Based Reliability on the Negative Bias Illumination Stress with Wavelength-Dependence in Amorphous Silicon Thin-Film Transistors

New Design Based Metrology for Fast Detection of Crucial Lithographic Defects

P-12: 3-D TCAD Simulation for Describing Intrinsic Fluctuations in Polycrystalline Silicon Thin Film Transistors

A Unified Statistical Model for Inter-Die and Intra-Die Process Variation

A Unified Compact Model of the Gate Oxide Reliability for Complete Circuit Level Analysis

SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design

EMI analysis of the LCD panel considering the display driver IC operations

The Statistical Failure Analysis for the Design of Robust SRAM in Nano-Scale Era

A fast lithography verification framework for litho-friendly layout design

Analysis for complex power distribution networks considering densely populated vias

Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis

A new fast and accurate method of extracting the parasitics of multi-layer packages

Two-Dimensional Raman Correlation Spectroscopy Study of thePathway for the Thermal Imidization of Poly(amic acid)

Control of drain induced barrier lowering in short channel poly-Si TFTs for AMOLED displays

Tenofovir rescue therapy for chronic hepatitis B patients after multiple treatment failures

Expression Pattern of the Hippo Pathway Effector TAZ in Cellular and Fibrotic Nonspecific Interstitial Pneumonia

A hybrid PPC method based on the empirical etch model for the 0.14/spl mu/m DRAM generation and beyond

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