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10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS

IEEE journal of solid-state circuits, 2012-09, Vol.47 (9), p.2049-2067

2012

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Oracle AutoML: a fast and predictive AutoML pipeline

Proceedings of the VLDB Endowment, 2020-08, Vol.13 (12), p.3166-3180

2020

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Ultra-efficient 10Gb/s hybrid integrated silicon photonic transmitter and receiver

Optics express, 2011-03, Vol.19 (6), p.5172

2011

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Flying and decoupling capacitance optimization for area-constrained on-chip switched-capacitor voltage regulators

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017, p.1269-1272

2017

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IEEE_Xplore

Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, p.1-5

2018

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Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver

Optics express, 2011-03, Vol.19 (6), p.5172-5186

2011

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System considerations for wireless capacitive chip-to-chip signaling

2011 IEEE International Symposium on Radio-Frequency Integration Technology, 2011, p.41-44

2011

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10 Gbps, 530 fJ/b optical transceiver circuits in 40 nm CMOS

2011 Symposium on VLSI Circuits - Digest of Technical Papers, 2011, p.290-291

2011

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IEEE_Xplore

Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS

IEEE Asian Solid-State Circuits Conference 2011, 2011, p.29-32

2011

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IEEE_Xplore

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10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS

Oracle AutoML: a fast and predictive AutoML pipeline

Ultra-efficient 10Gb/s hybrid integrated silicon photonic transmitter and receiver

Flying and decoupling capacitance optimization for area-constrained on-chip switched-capacitor voltage regulators

Design Considerations of Monolithically Integrated Voltage Regulators for Multicore Processors

Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver

System considerations for wireless capacitive chip-to-chip signaling

10 Gbps, 530 fJ/b optical transceiver circuits in 40 nm CMOS

Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS

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