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Cetus: A Source-to-Source Compiler Infrastructure for Multicores

Computer (Long Beach, Calif.), 2009-12, Vol.42 (12), p.36-42

2009

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OpenMP to GPGPU: a compiler framework for automatic translation and optimization

Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming, 2009, p.101-110

2009

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A Programming Model Performance Study Using the NAS Parallel Benchmarks

Scientific programming, 2010, Vol.18 (3-4), p.153-167

2010

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Supporting Realistic OpenMP Applications on a Commodity Cluster of Workstations

Lecture notes in computer science, 2003, p.170-179

2003

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A single-chip HDTV A/V decoder for low cost DTV receiver

IEEE transactions on consumer electronics, 1999-08, Vol.45 (3), p.887-893

1999

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Automatic Scaling of OpenMP Beyond Shared Memory

Languages and Compilers for Parallel Computing, p.1-15

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Optimizing OpenMP programs on software distributed shared memory systems

International journal of parallel programming, 2003-06, Vol.31 (3), p.225-249

2003

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Can Transactions Enhance Parallel Programs?

Languages and Compilers for Parallel Computing, p.2-16

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Neural network implementation using new pulse arithmetic

International journal of electronics, 1994-12, Vol.77 (6), p.1015-1024

1994

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Towards OpenMP Execution on Software Distributed Shared Memory Systems

High Performance Computing, 2002, p.457-468

2002

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Portable Compilers for OpenMP

Lecture notes in computer science, 2001, p.11-19

2001

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Optimizing irregular shared-memory applications for clusters

Proceedings of the 22nd annual international conference on Supercomputing, 2008, p.256-265

2008

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Multi-thread VLIW processor architecture for HDTV decoding

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044), 2000, p.559-562

2000

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Combined compile-time and runtime-driven, pro-active data movement in software DSM systems

Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems, 2004, p.1-6

2004

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OpenMP to GPGPU: a compiler framework for automatic translation and optimization

SIGPLAN notices, 2009-04, Vol.44 (4), p.101-110

2009

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CETUS: A SOURCE- TO-SOURCE COMPILER INFRASTRUCTURE FOR MULTICORES : Tools and Environments for Multicore and Many-Core Architectures

Computer (Long Beach, Calif.), 2009, Vol.42 (12), p.36-42

2009

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Is OpenMP for grids ?

Proceedings 16th International Parallel and Distributed Processing Symposium, 2002, p.8 pp

2002

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Optimizing shared memory programs for distributed memory architectures

Min, Seung-Jai

2009

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Languages and Compilers for Parallel Computing: 24th International Workshop, LCPC 2011, Fort Collins, CO, USA, September 8-10, 2011. Revised Selected Papers

1, 2013

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Programming Distributed Memory Sytems Using OpenMP

2007 IEEE International Parallel and Distributed Processing Symposium, 2007, p.1-8

2007

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A computationally efficient IDCT algorithm

Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg, 1997, Vol.2, p.973-976 vol.2

1997

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A single-chip HDTV A/V decoder for low-cost DTV receiver

1999 Digest of Technical Papers. International Conference on Consumer Electronics (Cat. No.99CH36277), 1999, p.126-127

1999

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A study on the stochastic computation using the ratio of one pulses and zero pulses

1994 IEEE International Symposium on Circuits and Systems (ISCAS), 1994, Vol.6, p.471-474 vol.6

1994

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Stereo correspondence with discrete-time cellular neural networks

1994 IEEE International Symposium on Circuits and Systems (ISCAS), 1994, Vol.6, p.225-228 vol.6

1994

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Molecular composition of PM2.5 organic aerosol measured at an urban site of Korea during the ACE-Asia campaign

Atmospheric environment (1994), 2006-07, Vol.40 (22), p.4182-4198

2006

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Cetus: A Source-to-Source Compiler Infrastructure for Multicores

OpenMP to GPGPU: a compiler framework for automatic translation and optimization

A Programming Model Performance Study Using the NAS Parallel Benchmarks

Supporting Realistic OpenMP Applications on a Commodity Cluster of Workstations

A single-chip HDTV A/V decoder for low cost DTV receiver

Automatic Scaling of OpenMP Beyond Shared Memory

Optimizing OpenMP programs on software distributed shared memory systems

Can Transactions Enhance Parallel Programs?

Neural network implementation using new pulse arithmetic

Towards OpenMP Execution on Software Distributed Shared Memory Systems

Portable Compilers for OpenMP

Optimizing irregular shared-memory applications for clusters

Multi-thread VLIW processor architecture for HDTV decoding

Combined compile-time and runtime-driven, pro-active data movement in software DSM systems

OpenMP to GPGPU: a compiler framework for automatic translation and optimization

CETUS: A SOURCE- TO-SOURCE COMPILER INFRASTRUCTURE FOR MULTICORES : Tools and Environments for Multicore and Many-Core Architectures

Is OpenMP for grids ?

Optimizing shared memory programs for distributed memory architectures

Languages and Compilers for Parallel Computing: 24th International Workshop, LCPC 2011, Fort Collins, CO, USA, September 8-10, 2011. Revised Selected Papers

Programming Distributed Memory Sytems Using OpenMP

A computationally efficient IDCT algorithm

A single-chip HDTV A/V decoder for low-cost DTV receiver

A study on the stochastic computation using the ratio of one pulses and zero pulses

Stereo correspondence with discrete-time cellular neural networks

Molecular composition of PM2.5 organic aerosol measured at an urban site of Korea during the ACE-Asia campaign

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