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A Yield Model for Integrated Circuits and its Application to Statistical Timing Analysis

IEEE transactions on computer-aided design of integrated circuits and systems, 2007-03, Vol.26 (3), p.574-591

2007

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Statistical timing analysis based on a timing yield model

Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004, 2004, p.460-465

2004

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Repeater scaling and its impact on CAD

IEEE transactions on computer-aided design of integrated circuits and systems, 2004-04, Vol.23 (4), p.451-463

2004

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A hospital-based study on lipid profile in acute myocardial infarction in Goa

International Journal Of Community Medicine And Public Health, 2022-07, Vol.9 (8), p.3289

2022

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A multi-port current source model for multiple-input switching effects in CMOS library cells

2006 43rd ACM/IEEE Design Automation Conference, 2006, p.247-252

2006

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Inductance and substrate analysis

Annual ACM IEEE Design Automation Conference: Proceedings of the 39th conference on Design automation : New Orleans, Louisiana, USA, 2002

Menezes, Noel

2002

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Routing and buffering

Annual ACM IEEE Design Automation Conference: Proceedings of the 39th conference on Design automation : New Orleans, Louisiana, USA, 2002

Menezes, Noel

2002

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A "true" electrical cell model for timing, noise, and power grid verification

2008 45th ACM/IEEE Design Automation Conference, 2008, p.462-467

2008

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Performance computation for precharacterized CMOS gates with RC loads

IEEE transactions on computer-aided design of integrated circuits and systems, 1996-05, Vol.15 (5), p.544-553

1996

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Noise-aware repeater insertion and wire-sizing for on-chip interconnect using hierarchical moment-matching

Proceedings - ACM IEEE Design Automation Conference, 1999, p.502-506

1999

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Statistical static timing analysis: how simple can we get?

Proceedings of the 42nd annual Design Automation Conference, 2005, p.652-657

2005

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The madeiran Portuguese and the establishment of the catholic church in British Guiana, 1835-98

Immigrants & minorities, 1988-03, Vol.7 (1), p.57-78

Menezes, M. Noel

1988

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Simultaneous gate and interconnect sizing for circuit-level delay optimization

32nd Design Automation Conference, 1995, p.690-695

1995

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The good, the bad, and the statistical

International Symposium on Physical Design: Proceedings of the 2007 international symposium on Physical design; 18-21 Mar. 2007, 2007, p.168-168

Menezes, Noel

2007

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Highlights of ISSCC and the design of state-of-the-art microprocessors

Annual ACM IEEE Design Automation Conference: Proceedings of the 40th conference on Design automation, 2003

Menezes, Noel

2003

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Comparative analysis of conventional and statistical design techniques

2007 44th ACM/IEEE Design Automation Conference, 2007, p.238-243

2007

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Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets

IEEE transactions on computer-aided design of integrated circuits and systems, 1997-02, Vol.16 (2), p.210-215

1997

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A sequential quadratic programming approach to concurrent gate and wire sizing

IEEE transactions on computer-aided design of integrated circuits and systems, 1997-08, Vol.16 (8), p.867-881

1997

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Power grid analysis and design

International Conference on Computer Aided Design: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design : San Jose, California, 2006

2006

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Spec-based repeater insertion and wire sizing for on-chip interconnect

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013), 1999, p.476-482

1999

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The Dutch and British Policy of Indian Subsidy: A System of Annual and Triennial Presents

Caribbean studies, 1973-10, Vol.13 (3), p.64-88

Menezes, Mary Noel

1973

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Post-processing of clock trees via wiresizing and buffering for robust design

IEEE transactions on computer-aided design of integrated circuits and systems, 1996-06, Vol.15 (6), p.691-701

1996

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Low power IC clock tree design

Proceedings of the Custom Integrated Circuits Conference, 1995, p.263-266

1995

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A nonlinear cell macromodel for digital applications

2007 IEEE/ACM International Conference on Computer-Aided Design, 2007, p.678-685

2007

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Timing and power analysis

International Conference on Computer Aided Design: Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design : San Jose, California, 2006

2006

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