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Classification and Novelty Detection of Tampered ICs Using ResCav

Journal of failure analysis and prevention, 2024, Vol.24 (5), p.2105-2112

2024

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A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR

IEEE journal of solid-state circuits, 2017-12, Vol.52 (12), p.3262-3275

2017

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A Capacitively Coupled, Pseudo Return-to-Zero Input, Latched-Bias Data Receiver

IEEE journal of solid-state circuits, 2018-09, Vol.53 (9), p.2500-2511

2018

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A Time-Interleaved Multimode RF-DAC for Direct Digital-to-RF Synthesis

IEEE journal of solid-state circuits, 2016-05, Vol.51 (5), p.1109-1124

2016

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Frequency Tuning Range Extension in LC-VCOs Using Negative-Capacitance Circuits

IEEE transactions on circuits and systems. II, Express briefs, 2013-04, Vol.60 (4), p.182-186

2013

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Analysis of SRAM Enhancements Through Sense Amplifier Capacitive Offset Correction and Replica Self-Timing

IEEE transactions on circuits and systems. I, Regular papers, 2019-06, Vol.66 (6), p.2037-2050

2019

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A Time-Interleaved Multimode \Delta\Sigma RF-DAC for Direct Digital-to-RF Synthesis

IEEE journal of solid-state circuits, 2016-05, Vol.51 (5), p.1109-1124

2016

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An AC coupled 10 Gb/s LVDS-compatible receiver with latched data biasing in 130 nm SiGe BiCMOS

2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2017, p.1-4

2017

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A time-interleaved multi-mode ΔΣ RF-DAC for direct digital-to-RF synthesis

2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2015, p.103-106

2015

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16.6 A 10b DC-to-20GHz multiple-return-to-zero DAC with >48dB SFDR

2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017, p.286-287

2017

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A −189 dBc/Hz FOMT wide tuning range Ka-band VCO using tunable negative capacitance and inductance redistribution

2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2013, p.199-202

2013

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An Interleaved Multi-mode ΔΣ RF-DAC with Fully Integrated, AC Coupled Digital Input

McCue, Jamin J

2015

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An Active Double-Balanced Down-Conversion Mixer in InP/Si BICMOS Operating from 70-110 GHz

2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2014, p.1-4

2014

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On the design of RF-DACs for random acquisition based reconfigurable receivers

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.610-613

2014

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Analytical and experimental study of tuning range limitation in mm-wave CMOS LC-VCOs

2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2013, p.2468-2471

2013

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A 10mW 37.8GHz current-redistribution BiCMOS VCO with an average FOMT of −193.5dBc/Hz

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, p.150-151

2013

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Experimental Characterization of Two-Photon Optical Beam Induced Current Imaging for Microelectronics Assurance

2023 IEEE Physical Assurance and Inspection of Electronics (PAINE), 2023, p.1-5

2023

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Multi-Tone Analysis for the Authentication of Electronic Devices

NAECON 2023 - IEEE National Aerospace and Electronics Conference, 2023, p.54-58

2023

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Design of Wide Tuning-Range mm-Wave VCOs Using Negative Capacitance

2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2012, p.1-4

2012

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Process Design Kit and Initial Demonstration of Digital Metal-Embedded Chip Assembly for High Density IO Fan-Out Packaging

2023 IEEE 73rd Electronic Components and Technology Conference (ECTC), 2023, p.623-628

2023

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Two-Photon Optical Beam Induced Current for Circuit Level Verification and Validation of a 130 nm Microelectronic Device

2021 IEEE Physical Assurance and Inspection of Electronics (PAINE), 2021, p.1-7

2021

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Classification and Novelty Detection of Tampered ICs Using ResCav

A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR

A Capacitively Coupled, Pseudo Return-to-Zero Input, Latched-Bias Data Receiver

A Time-Interleaved Multimode RF-DAC for Direct Digital-to-RF Synthesis

Frequency Tuning Range Extension in LC-VCOs Using Negative-Capacitance Circuits

Analysis of SRAM Enhancements Through Sense Amplifier Capacitive Offset Correction and Replica Self-Timing

A Time-Interleaved Multimode \Delta\Sigma RF-DAC for Direct Digital-to-RF Synthesis

An AC coupled 10 Gb/s LVDS-compatible receiver with latched data biasing in 130 nm SiGe BiCMOS

A time-interleaved multi-mode ΔΣ RF-DAC for direct digital-to-RF synthesis

16.6 A 10b DC-to-20GHz multiple-return-to-zero DAC with >48dB SFDR

A −189 dBc/Hz FOMT wide tuning range Ka-band VCO using tunable negative capacitance and inductance redistribution

An Interleaved Multi-mode ΔΣ RF-DAC with Fully Integrated, AC Coupled Digital Input

An Active Double-Balanced Down-Conversion Mixer in InP/Si BICMOS Operating from 70-110 GHz

On the design of RF-DACs for random acquisition based reconfigurable receivers

Analytical and experimental study of tuning range limitation in mm-wave CMOS LC-VCOs

A 10mW 37.8GHz current-redistribution BiCMOS VCO with an average FOMT of −193.5dBc/Hz

Experimental Characterization of Two-Photon Optical Beam Induced Current Imaging for Microelectronics Assurance

Multi-Tone Analysis for the Authentication of Electronic Devices

Design of Wide Tuning-Range mm-Wave VCOs Using Negative Capacitance

Process Design Kit and Initial Demonstration of Digital Metal-Embedded Chip Assembly for High Density IO Fan-Out Packaging

Two-Photon Optical Beam Induced Current for Circuit Level Verification and Validation of a 130 nm Microelectronic Device

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