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Nth order voltage mode low-pass filter using current conveyors

2008 2nd International Conference on Signals, Circuits and Systems, 2008, p.1-4

2008

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Implementation of face recognition system in virtex II Pro platform

2009 3rd International Conference on Signals, Circuits and Systems (SCS), 2009, p.1-6

2009

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Fast pupil location for better iris detection

2009 6th International Multi-Conference on Systems, Signals and Devices, 2009, p.1-6

2009

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High performance dual-output second and third generation current conveyors and current-mode multifunction filter application

2009 6th International Multi-Conference on Systems, Signals and Devices, 2009, p.1-6

2009

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Neural network based edge detection with pulse mode operations and floating point format precision

2008 3rd International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2008, p.1-5

2008

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Wavelet Network Based Approach for Iris Localization

2006 2nd International Conference on Information & Communication Technologies, 2006, Vol.1, p.1037-1045

2006

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A Multi Objective Genetic Algorithm based optimization of wavelet transform implementation

2008 3rd International Design and Test Workshop, 2008, p.87-91

2008

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FPGA Implementation of Programmable Pulse Mode Neural Network with on Chip Learning for signature application

2006 13th IEEE International Conference on Electronics, Circuits and Systems, 2006, p.942-945

2006

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Feature extraction and relevance evaluation for heterogeneous image database recognition

2008 First Workshops on Image Processing Theory, Tools and Applications, 2008, p.1-6

2008

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Implementation of watershed based image segmentation algorithm in virtex II pro platform

2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era, 2009, p.247-252

2009

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A New High Frequency Second Generation Current Conveyor Based Chaos Generator

2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007, p.387-390

2007

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Analog VLSI CMOS implementation of beta neuron in a low power low voltage environment

2005 12th IEEE International Conference on Electronics, Circuits and Systems, 2005, p.1-4

2005

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A subthreshold mode programmable implementation of the Gaussian function for RBF neural networks applications

Proceedings of the IEEE Internatinal Symposium on Intelligent Control, 2002, p.454-459

2002

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Content description and classification for Image recognition system

2008 3rd International Conference on Information and Communication Technologies: From Theory to Applications, 2008, p.1-4

2008

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A new low voltage CMOS current controlled oscillator with minimum phase noise

Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004, 2004, p.616-619

2004

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Optimization of a rail to rail low voltage CCII for active filter applications

2008 3rd International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2008, p.1-6

2008

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Remotely sensed image segmentation by nonlinear correlation

2006 2nd International Conference on Information & Communication Technologies, 2006, Vol.1, p.424-429

2006

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Hardware implementation of BFNN and RBFNN in FPGA technology: Quantization issues

2005 12th IEEE International Conference on Electronics, Circuits and Systems, 2005, p.1-4

2005

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An optimized low voltage and High Frequency CCII based multifunction Filters

2006 13th IEEE International Conference on Electronics, Circuits and Systems, 2006, p.1268-1271

2006

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FPGA implementation of programmable pulse mode neural network with on chip learning

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006, 2006, p.159-164

2006

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On the frequency compensation of simulated CCII based tunable floating inductance for LC ladder filters applications

International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04, 2004, p.449-452

2004

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A radio frequency CMOS current controlled oscillator based on a new low parasitic resistance CCII

International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04, 2004, p.563-566

2004

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Nth order voltage mode low-pass filter using current conveyors

Implementation of face recognition system in virtex II Pro platform

Fast pupil location for better iris detection

High performance dual-output second and third generation current conveyors and current-mode multifunction filter application

Neural network based edge detection with pulse mode operations and floating point format precision

Wavelet Network Based Approach for Iris Localization

A Multi Objective Genetic Algorithm based optimization of wavelet transform implementation

FPGA Implementation of Programmable Pulse Mode Neural Network with on Chip Learning for signature application

Feature extraction and relevance evaluation for heterogeneous image database recognition

Implementation of watershed based image segmentation algorithm in virtex II pro platform

A New High Frequency Second Generation Current Conveyor Based Chaos Generator

Analog VLSI CMOS implementation of beta neuron in a low power low voltage environment

A subthreshold mode programmable implementation of the Gaussian function for RBF neural networks applications

Content description and classification for Image recognition system

A new low voltage CMOS current controlled oscillator with minimum phase noise

Optimization of a rail to rail low voltage CCII for active filter applications

Remotely sensed image segmentation by nonlinear correlation

Hardware implementation of BFNN and RBFNN in FPGA technology: Quantization issues

An optimized low voltage and High Frequency CCII based multifunction Filters

FPGA implementation of programmable pulse mode neural network with on chip learning

On the frequency compensation of simulated CCII based tunable floating inductance for LC ladder filters applications

A radio frequency CMOS current controlled oscillator based on a new low parasitic resistance CCII

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