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Placement of Linked Dynamic Data Structures over Heterogeneous Memories in Embedded Systems

ACM transactions on embedded computing systems, 2015-03, Vol.14 (2), p.1-30

2015

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Software metadata: Systematic characterization of the memory behaviour of dynamic applications

The Journal of systems and software, 2010-06, Vol.83 (6), p.1051-1075

2010

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Systematic dynamic memory management design methodology for reduced memory footprint

ACM transactions on design automation of electronic systems, 2006-04, Vol.11 (2), p.465-489

2006

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Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems

The Journal of systems and software, 2009-04, Vol.82 (4), p.590-602

2009

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A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms

Design Automation Conference, 2010, p.549-554

2010

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Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance

Computer communications, 2006-08, Vol.29 (13), p.2612-2620

2006

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Middleware design optimization of wireless protocols based on the exploitation of dynamic input patterns

Proceedings of the conference on Design, automation and test in Europe, 2007, p.1036-1041

2007

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Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study

Embedded Computer Systems: Architectures, Modeling, and Simulation, p.48-57

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Multi-granularity NoC Simulation Framework for Early Phase Exploration of SDR Hardware Platforms

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, p.165-174

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Systematic methodology for exploration of performance – Energy trade-offs in network applications using Dynamic Data Type refinement

Journal of systems architecture, 2007-07, Vol.53 (7), p.417-436

2007

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Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems

Integration (Amsterdam), 2006-03, Vol.39 (2), p.113-130

2006

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Middleware Design Optimization of Wireless Protocols Based on the Exploitation of Dynamic Input Patterns

2007 Design, Automation & Test in Europe Conference & Exhibition, 2007, p.1-6

2007

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Direct memory access usage optimization in network applications for reduced memory latency and energy consumption

Journal of Embedded Computing, 2009, Vol.3 (3), p.241-254

2009

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Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, p.373-383

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Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications

Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.6 pp.

2006

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Simulation framework for early phase exploration of SDR platforms: A case study of platform dimensioning

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.312-315

2009

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Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems: Low-Power Design Techniques

Integration (Amsterdam), 2006, Vol.39 (2), p.113-130

2006

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Automated Exploration of Pareto-optimal Configurations in Parameterized Dynamic Memory Allocation for Embedded Systems

Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.1-2

2006

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Dynamic memory management design methodology for reduced memory footprint in multimedia and wireless network applications

Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004, Vol.1, p.532-537 Vol.1

2004

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Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications

Lecture notes in computer science, 2005, p.354-364

2005

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Versatile system-level memory-aware platform description approach for embedded MPSoCs

SIGPLAN notices, 2010-04, Vol.45 (4), p.9-16

2010

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Systematic design flow for dynamic data management in visual texture decoder of MPEG-4

2006 IEEE International Symposium on Circuits and Systems (ISCAS), 2006, p.4 pp.-4750

2006

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Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology

Lecture notes in computer science, 2004, p.26-37

2004

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Versatile system-level memory-aware platform description approach for embedded MPSoCs

Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems, 2010, p.9-16

2010

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Middleware design optimization of wireless protocols based on the exploitation of dynamic input patterns

Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 16-20 Apr. 2007, 2007, p.1036-1041

2007

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Placement of Linked Dynamic Data Structures over Heterogeneous Memories in Embedded Systems

Software metadata: Systematic characterization of the memory behaviour of dynamic applications

Systematic dynamic memory management design methodology for reduced memory footprint

Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems

A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms

Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance

Middleware design optimization of wireless protocols based on the exploitation of dynamic input patterns

Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study

Multi-granularity NoC Simulation Framework for Early Phase Exploration of SDR Hardware Platforms

Systematic methodology for exploration of performance – Energy trade-offs in network applications using Dynamic Data Type refinement

Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems

Middleware Design Optimization of Wireless Protocols Based on the Exploitation of Dynamic Input Patterns

Direct memory access usage optimization in network applications for reduced memory latency and energy consumption

Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption

Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications

Simulation framework for early phase exploration of SDR platforms: A case study of platform dimensioning

Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems: Low-Power Design Techniques

Automated Exploration of Pareto-optimal Configurations in Parameterized Dynamic Memory Allocation for Embedded Systems

Dynamic memory management design methodology for reduced memory footprint in multimedia and wireless network applications

Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications

Versatile system-level memory-aware platform description approach for embedded MPSoCs

Systematic design flow for dynamic data management in visual texture decoder of MPEG-4

Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology

Versatile system-level memory-aware platform description approach for embedded MPSoCs

Middleware design optimization of wireless protocols based on the exploitation of dynamic input patterns

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