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VLSI Algorithms and Architectures: Aegean Workshop on Computing Loutraki, Greece, July 8–11, 1986 Proceedings

1986

Volltextzugriff (PDF)

Creating custom fitted point of goggles through facial metrics

Proceedings of the 7th International Conference on PErvasive Technologies Related to Assistive Environments, 2014, p.1-2

2014

Volltextzugriff (PDF)

Extraction of Discriminative Functional MRI Activation Patterns and an Application to Alzheimer’s Disease

Medical Image Computing and Computer-Assisted Intervention – MICCAI 2004, p.727-735

Volltextzugriff (PDF)

Two processor scheduling is in NC

VLSI Algorithms and Architectures, 2005, p.12-25

2005

Volltextzugriff (PDF)

Nonsequential computation and laws of nature

VLSI Algorithms and Architectures, 2005, p.108-120

2005

Volltextzugriff (PDF)

Linear algorithms for two CMOS layout problems

VLSI Algorithms and Architectures, 2005, p.121-132

2005

Volltextzugriff (PDF)

Fast and efficient parallel linear programming and linear least squares computations

VLSI Algorithms and Architectures, 2005, p.283-295

2005

Volltextzugriff (PDF)

A comparative study of concurrency control methods in B-trees

VLSI Algorithms and Architectures, 1986-01, p.305-316

1986

Volltextzugriff (PDF)

Exploiting hierarchy in VLSI design

VLSI Algorithms and Architectures, 1986, p.180-193

1986

Volltextzugriff (PDF)

Linear and book embeddings of graphs

VLSI Algorithms and Architectures, 1986, p.226-235

1986

Volltextzugriff (PDF)

Efficient parallel evaluation of straight-line code and arithmetic circuits

VLSI Algorithms and Architectures, 1986, p.236-245

1986

Volltextzugriff (PDF)

Diogenes, circa 1986 Ψαχνω για ενα τιμιo ανϑρoπo

VLSI Algorithms and Architectures, 2005, p.96-107

2005

Volltextzugriff (PDF)

Generalized river routing — Algorithms and performance bounds: Extended abstract

VLSI Algorithms and Architectures, 2005, p.317-328

2005

Volltextzugriff (PDF)

Parallel ear decomposition search (EDS) and st-numbering in graphs: Extended abstract

VLSI Algorithms and Architectures, 2005, p.34-45

2005

Volltextzugriff (PDF)

Optimal tradeoffs for addition on systolic arrays: Extended abstract

VLSI Algorithms and Architectures, 2005, p.57-69

2005

Volltextzugriff (PDF)

Combinational static CMOS networks: Extended summary

VLSI Algorithms and Architectures, 2005, p.271-282

2005

Volltextzugriff (PDF)

AT2-optimal galois field multiplier for VLSI

VLSI Algorithms and Architectures, 2005, p.217-225

2005

Volltextzugriff (PDF)

Breaking symmetry in synchronous networks

VLSI Algorithms and Architectures, 1986, p.26-33

1986

Volltextzugriff (PDF)

On the connection between hexagonal and unidirectional rectangular systolic arrays

VLSI Algorithms and Architectures, 1986, p.70-83

1986

Volltextzugriff (PDF)

On the time required to sum n semigroup elements on a parallel machine with simultaneous writes

VLSI Algorithms and Architectures, 1986, p.296-304

1986

Volltextzugriff (PDF)

A unifying framework for systolic designs

VLSI Algorithms and Architectures, 1986, p.46-56

1986

Volltextzugriff (PDF)

Lower bounds for sorting on mesh-connected architectures

VLSI Algorithms and Architectures, 1986, p.84-95

1986

Volltextzugriff (PDF)

Parallel tree techniques and code optimization

VLSI Algorithms and Architectures, 1986, p.205-216

1986

Volltextzugriff (PDF)

Vlsi algorithms and pipelined architectures for solving structured linear system

VLSI Algorithms and Architectures, 1986, p.156-165

1986

Volltextzugriff (PDF)

A polynomial algorithm for recognizing small cutwidth in hypergraphs

VLSI Algorithms and Architectures, 1986, p.252-260

1986

Volltextzugriff (PDF)

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VLSI Algorithms and Architectures: Aegean Workshop on Computing Loutraki, Greece, July 8–11, 1986 Proceedings

Creating custom fitted point of goggles through facial metrics

Extraction of Discriminative Functional MRI Activation Patterns and an Application to Alzheimer’s Disease

Two processor scheduling is in NC

Nonsequential computation and laws of nature

Linear algorithms for two CMOS layout problems

Fast and efficient parallel linear programming and linear least squares computations

A comparative study of concurrency control methods in B-trees

Exploiting hierarchy in VLSI design

Linear and book embeddings of graphs

Efficient parallel evaluation of straight-line code and arithmetic circuits

Diogenes, circa 1986 Ψαχνω για ενα τιμιo ανϑρoπo

Generalized river routing — Algorithms and performance bounds: Extended abstract

Parallel ear decomposition search (EDS) and st-numbering in graphs: Extended abstract

Optimal tradeoffs for addition on systolic arrays: Extended abstract

Combinational static CMOS networks: Extended summary

AT2-optimal galois field multiplier for VLSI

Breaking symmetry in synchronous networks

On the connection between hexagonal and unidirectional rectangular systolic arrays

On the time required to sum n semigroup elements on a parallel machine with simultaneous writes

A unifying framework for systolic designs

Lower bounds for sorting on mesh-connected architectures

Parallel tree techniques and code optimization

Vlsi algorithms and pipelined architectures for solving structured linear system

A polynomial algorithm for recognizing small cutwidth in hypergraphs

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