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Phenylephrine increases cardiac output by raising cardiac preload in patients with anesthesia induced hypotension

Journal of clinical monitoring and computing, 2018-12, Vol.32 (6), p.969-976

2018

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The pelvifemoral rhythm in cam-type femoroacetabular impingement

Clinical biomechanics (Bristol), 2014-01, Vol.29 (1), p.63-67

2014

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Superficial Serratus Anterior Plane Block for Minimal Invasive Cardiac Surgery: a single-center randomized controlled trial

Acta anaesthesiologica belgica, 2024-05, Vol.75 (2), p.107-115

2024

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High- k dielectrics for future generation memory devices (Invited Paper)

Microelectronic engineering, 2009-07, Vol.86 (7), p.1789-1795

2009

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Nitrogen Incorporation in HfSiO(N)/TaN Gate Stacks: Impact on Performances and NBTI

IEEE electron device letters, 2007-07, Vol.28 (7), p.613-615

2007

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Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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Composition influence on the physical and electrical properties of SrxTi1−xOy-based metal-insulator-metal capacitors prepared by atomic layer deposition using TiN bottom electrodes

Journal of applied physics, 2009-11, Vol.106 (9)

2009

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Band alignment between (100)Si and Hf-based complex metal oxides

Microelectronic engineering, 2005-06, Vol.80, p.102-105

2005

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Vanishing tumour of the colon ascendens due to acquired type II C1-inhibitor deficiency

Acta clinica belgica (English ed. Online), 2010-03, Vol.65 (2), p.122-126

2010

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(Invited) Current Status of High-k and Metal Gates in CMOS

ECS transactions, 2013, Vol.50 (4), p.207-210

2013

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Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

2016 IEEE Symposium on VLSI Technology, 2016, p.1-2

2016

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Characterization of the annealing impact on La2O3/HfO2 and HfO2/La2O3 stacks for MOS applications

Microelectronic engineering, 2010-03, Vol.87 (3), p.278-281

2010

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In-Line Electrical Metrology for High-K Gate Dielectrics Deposited by Atomic Layer CVD

Journal of the Electrochemical Society, 2003-09, Vol.150 (9), p.F169

2003

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Atomic Layer Deposition of Strontium Titanate Films Using Sr([sup t]Bu[sub 3]Cp)[sub 2] and Ti(OMe)[sub 4]

Journal of the Electrochemical Society, 2010, Vol.157 (1), p.G1

2010

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Pure-Metal Replacement Gate for Reliable 30 nm Pitch Scaled 3D NAND Flash

2024 IEEE International Memory Workshop (IMW), 2024, p.1-4

2024

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Band alignment at the interface of (100)Si with HfxTa1−xOy high-κ dielectric layers

Applied physics letters, 2005-02, Vol.86 (7)

2005

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Selective ALD Mo Deposition in 10nm Contacts

2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM), 2023, p.1-3

2023

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Evaluation of Atomic Layer Deposited NbN and NbSiN as Metal Gate Materials

Journal of the Electrochemical Society, 2006, Vol.153 (5), p.G437

2006

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Buried Power Rail Metal exploration towards the 1 nm Node

2021 IEEE International Electron Devices Meeting (IEDM), 2021, p.22.5.1-22.5.4

2021

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Potential remedies for the VT/Vfb-shift problem of Hf/polysilicon-based gate stacks: a solution-based survey

Microelectronics and reliability, 2005-05, Vol.45 (5-6), p.786-789

2005

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DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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Gas source MBE growth of Si/SiGe device materials

Journal of crystal growth, 1996-07, Vol.164 (1-4), p.223-234

1996

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Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.31.1.1-31.1.4

2015

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Characterization of Epitaxial Si:C:P and Si:P Layers for Source/Drain Formation in Advanced Bulk FinFETs

ECS transactions, 2014, Vol.64 (6), p.977-987

2014

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Evaluation of plasma parameters on PEALD deposited TaCN

Microelectronic engineering, 2013-07, Vol.107, p.156-160

2013

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Phenylephrine increases cardiac output by raising cardiac preload in patients with anesthesia induced hypotension

The pelvifemoral rhythm in cam-type femoroacetabular impingement

Superficial Serratus Anterior Plane Block for Minimal Invasive Cardiac Surgery: a single-center randomized controlled trial

High- k dielectrics for future generation memory devices (Invited Paper)

Nitrogen Incorporation in HfSiO(N)/TaN Gate Stacks: Impact on Performances and NBTI

Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFET

Composition influence on the physical and electrical properties of SrxTi1−xOy-based metal-insulator-metal capacitors prepared by atomic layer deposition using TiN bottom electrodes

Band alignment between (100)Si and Hf-based complex metal oxides

Vanishing tumour of the colon ascendens due to acquired type II C1-inhibitor deficiency

(Invited) Current Status of High-k and Metal Gates in CMOS

Scalability of InGaAs gate-all-around FET integrated on 300mm Si platform: Demonstration of channel width down to 7nm and Lg down to 36nm

Characterization of the annealing impact on La2O3/HfO2 and HfO2/La2O3 stacks for MOS applications

In-Line Electrical Metrology for High-K Gate Dielectrics Deposited by Atomic Layer CVD

Atomic Layer Deposition of Strontium Titanate Films Using Sr([sup t]Bu[sub 3]Cp)[sub 2] and Ti(OMe)[sub 4]

Pure-Metal Replacement Gate for Reliable 30 nm Pitch Scaled 3D NAND Flash

Band alignment at the interface of (100)Si with HfxTa1−xOy high-κ dielectric layers

Selective ALD Mo Deposition in 10nm Contacts

Evaluation of Atomic Layer Deposited NbN and NbSiN as Metal Gate Materials

Buried Power Rail Metal exploration towards the 1 nm Node

Potential remedies for the VT/Vfb-shift problem of Hf/polysilicon-based gate stacks: a solution-based survey

DRAM-Peri FinFET - A Thermally-Stable High-Performance Advanced CMOS RMG Platform with Mo-Based pWFM for sub-10nm DRAM

Gas source MBE growth of Si/SiGe device materials

Gate-all-around InGaAs nanowire FETS with peak transconductance of 2200μS/μm at 50nm Lg using a replacement Fin RMG flow

Characterization of Epitaxial Si:C:P and Si:P Layers for Source/Drain Formation in Advanced Bulk FinFETs

Evaluation of plasma parameters on PEALD deposited TaCN

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