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An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS

IEEE journal of solid-state circuits, 2019-04, Vol.54 (4), p.1074-1085

2019

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Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDO

IEEE journal of solid-state circuits, 2020-02, Vol.55 (2), p.478-493

2020

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2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors

IEEE journal of solid-state circuits, 2012-11, Vol.47 (11), p.2807-2821

2012

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Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering

IEEE journal of solid-state circuits, 2019-02, Vol.54 (2), p.569-583

2019

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Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator

IEEE journal of solid-state circuits, 2018-08, Vol.53 (8), p.2399-2414

2018

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Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC)

IEEE journal of solid-state circuits, 2023-01, Vol.58 (1), p.3-7

2023

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A 100-Gbps Fault-Injection Attack-Resistant AES-256 Engine With 99.1%-99.99% Error Coverage in Intel 4 CMOS

IEEE journal of solid-state circuits, 2024-01, Vol.59 (1), p.1-11

2024

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A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS

IEEE journal of solid-state circuits, 2017-04, Vol.52 (4), p.940-949

2017

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mu RNG: A 300-950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS

IEEE journal of solid-state circuits, 2016-07, Vol.51 (7), p.1695-1704

2016

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A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS

IEEE journal of solid-state circuits, 2023-04, Vol.58 (4), p.1106-1116

2023

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A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS

IEEE journal of solid-state circuits, 2021-04, Vol.56 (4), p.1141-1151

2021

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A Fully-Digital Variation-Tolerant Runtime Detector for PCB-level Probing Attack in a 28-nm CMOS

IEEE solid-state circuits letters, 2023-01, Vol.6, p.1-1

2023

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53 Gbps Native (2 ^) ^ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors

IEEE journal of solid-state circuits, 2011-04, Vol.46 (4), p.767-776

2011

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An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOS

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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A 280 mV-to-1.1 V 256b Reconfigurable SIMD Vector Permutation Engine With 2-Dimensional Shuffle in 22 nm Tri-Gate CMOS

IEEE journal of solid-state circuits, 2013-01, Vol.48 (1), p.118-127

2013

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A 2.05 GVertices/s 151 mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32 nm CMOS

IEEE journal of solid-state circuits, 2013-01, Vol.48 (1), p.128-139

2013

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A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS

IEEE journal of solid-state circuits, 2009-01, Vol.44 (1), p.107-114

2009

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A 9.0-TOPS/W Hash-Based Deep Neural Network Accelerator Enabling 128× Model Compression in 10-nm FinFET CMOS

IEEE solid-state circuits letters, 2020, Vol.3, p.338-341

2020

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A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS

IEEE journal of solid-state circuits, 2010-01, Vol.45 (1), p.95-102

2010

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A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS

IEEE journal of solid-state circuits, 2005-01, Vol.40 (1), p.44-51

2005

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EQZ-LDO: A Secure Digital Low Dropout Regulator Armed With Detection-Driven Protection Against Correlation Power Analysis

IEEE journal of solid-state circuits, 2024, p.1-10

2024

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A 1.9 Gb/s 358 mW 16-256 State Reconfigurable Viterbi Accelerator in 90 nm CMOS

IEEE journal of solid-state circuits, 2008-01, Vol.43 (1), p.214-222

2008

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A 9-GHz 65-nm intel® pentium 4 processor integer execution unit

IEEE journal of solid-state circuits, 2007, Vol.42 (1), p.26-37

2007

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A Digital Low-Dropout Regulator With Autotuned PID Compensator and Dynamic Gain Control for Improved Transient Performance Under Process Variations and Aging

IEEE transactions on power electronics, 2020-03, Vol.35 (3), p.3242-3253

2020

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Split-Path Fused Floating Point Multiply Accumulate (FPMAC)

2013 IEEE 21st Symposium on Computer Arithmetic, 2013, p.17-24

2013

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An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS

Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDO

2.4 Gbps, 7 mW All-Digital PVT-Variation Tolerant True Random Number Generator for 45 nm CMOS High-Performance Microprocessors

Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering

Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator

Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC)

A 100-Gbps Fault-Injection Attack-Resistant AES-256 Engine With 99.1%-99.99% Error Coverage in Intel 4 CMOS

A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS

mu RNG: A 300-950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS

A 7-Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS

A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS

A Fully-Digital Variation-Tolerant Runtime Detector for PCB-level Probing Attack in a 28-nm CMOS

53 Gbps Native (2 ^) ^ Composite-Field AES-Encrypt/Decrypt Accelerator for Content-Protection in 45 nm High-Performance Microprocessors

An 8.3-to-18Gbps Reconfigurable SCA-Resistant/Dual-Core/Blind-Bulk AES Engine in Intel 4 CMOS

A 280 mV-to-1.1 V 256b Reconfigurable SIMD Vector Permutation Engine With 2-Dimensional Shuffle in 22 nm Tri-Gate CMOS

A 2.05 GVertices/s 151 mW Lighting Accelerator for 3D Graphics Vertex and Pixel Shading in 32 nm CMOS

A 320 mV 56 μW 411 GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65 nm CMOS

A 9.0-TOPS/W Hash-Based Deep Neural Network Accelerator Enabling 128× Model Compression in 10-nm FinFET CMOS

A 300 mV 494GOPS/W Reconfigurable Dual-Supply 4-Way SIMD Vector Processing Accelerator in 45 nm CMOS

A 4-GHz 300-mW 64-bit integer execution ALU with dual supply voltages in 90-nm CMOS

EQZ-LDO: A Secure Digital Low Dropout Regulator Armed With Detection-Driven Protection Against Correlation Power Analysis

A 1.9 Gb/s 358 mW 16-256 State Reconfigurable Viterbi Accelerator in 90 nm CMOS

A 9-GHz 65-nm intel® pentium 4 processor integer execution unit

A Digital Low-Dropout Regulator With Autotuned PID Compensator and Dynamic Gain Control for Improved Transient Performance Under Process Variations and Aging

Split-Path Fused Floating Point Multiply Accumulate (FPMAC)

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