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74-dBc SFDR 71-MHz Four-Stage Pipeline ROM-Less DDFS Using Factorized Second-Order Parabolic Equations

IEEE transactions on very large scale integration (VLSI) systems, 2019-10, Vol.27 (10), p.2464-2468

2019

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A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process

Integration (Amsterdam), 2023-05, Vol.90, p.245-260

2023

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A 100-MHz 3.352-mW 8-bit shift register using low-power DETFF using 90-nm CMOS process

International journal of electronics letters, 2023-07, Vol.11 (3), p.300-315

2023

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High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors

Circuits, systems, and signal processing, 2021-09, Vol.40 (9), p.4187-4195

2021

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2×VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process

Circuits, systems, and signal processing, 2021-06, Vol.40 (6), p.2824-2840

2021

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Single-chip DC-DC buck converter design based on PWM with high-efficiency in light load

International journal of electronics letters, 2023-07, Vol.11 (3), p.255-266

2023

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A single-chip PFM-controlled LED driver with 0.5% illuminance variation

Microelectronics, 2024-05, Vol.147, p.106167, Article 106167

2024

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State of charge, state of health, and state of function monitoring for EV BMS

2017 IEEE International Conference on Consumer Electronics (ICCE), 2017, p.310-311

2017

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On-chip CMOS Corner Detector Design for Panel Drivers

2021 18th International SoC Design Conference (ISOCC), 2021, p.11-12

2021

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Analysis of Layout Arrangment for CMOS Oscillators to Reduce Overall Variation on Wafer

2021 18th International SoC Design Conference (ISOCC), 2021, p.1-2

2021

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A PFM-controlled LED Driver To Achieve Consistent Illuminance

2021 IEEE 4th International Conference on Electronics Technology (ICET), 2021, p.942-945

2021

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A Robust Time-to-Digital Converter Design with High Precision for Underwater Vehicle System Clock Synchronization and Sensing

2019 IEEE Underwater Technology (UT), 2019, p.1-4

2019

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High Voltage CMOS Bidirectional Current Sensor for Battery Moniroring in Portable Devices

2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), 2020, p.1-4

2020

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2$$\times $$VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process

Circuits, systems, and signal processing, 2021-06, Vol.40 (6), p.2824-2840

2021

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Analysis of Layout Arrangement for CMOS Oscillators to Reduce Overall Variation on Silicon

Advances in Science, Technology and Engineering Systems Journal (ASTESJ), 2022-09, Vol.7 (5), p.46-52

2022

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A CMOS On-Chip High-Precision PVTL Detector

Advances in Science, Technology and Engineering Systems Journal (ASTESJ), 2022-05, Vol.7 (3), p.87-94

2022

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2xVDD digital output buffer insensitive to process and voltage variations

2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), 2017, p.29-32

2017

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A Broken Line Detection Circuit for Multi-cell Li-ion Battery Module1

2019 IEEE International Conference on Consumer Electronics (ICCE), 2019, p.1-2

2019

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0.7 % error rate 3A bidirectional current sensor using high voltage CMOS process

Microelectronics, 2021-08, Vol.114, p.105127, Article 105127

2021

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A Deep-Learning Algorithm-Enhanced Electrocardiogram Interpretation for Detecting Pulmonary Embolism

Acta Cardiologica Sinica, 2023-11, Vol.39 (6), p.913-928

2023

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74-dBc SFDR 71-MHz Four-Stage Pipeline ROM-Less DDFS Using Factorized Second-Order Parabolic Equations

A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process

A 100-MHz 3.352-mW 8-bit shift register using low-power DETFF using 90-nm CMOS process

High-Accuracy Impedance Read-out Circuit for BIA-type Biomedical Sensors

2×VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process

Single-chip DC-DC buck converter design based on PWM with high-efficiency in light load

A single-chip PFM-controlled LED driver with 0.5% illuminance variation

State of charge, state of health, and state of function monitoring for EV BMS

On-chip CMOS Corner Detector Design for Panel Drivers

Analysis of Layout Arrangment for CMOS Oscillators to Reduce Overall Variation on Wafer

A PFM-controlled LED Driver To Achieve Consistent Illuminance

A Robust Time-to-Digital Converter Design with High Precision for Underwater Vehicle System Clock Synchronization and Sensing

High Voltage CMOS Bidirectional Current Sensor for Battery Moniroring in Portable Devices

2$$\times $$VDD 500 MHz Digital Output Buffer with Optimal Driver Transistor Sizing for Slew Rate Self-adjustment and Leakage Reduction Using 28-nm CMOS Process

Analysis of Layout Arrangement for CMOS Oscillators to Reduce Overall Variation on Silicon

A CMOS On-Chip High-Precision PVTL Detector

2xVDD digital output buffer insensitive to process and voltage variations

A Broken Line Detection Circuit for Multi-cell Li-ion Battery Module1

0.7 % error rate 3A bidirectional current sensor using high voltage CMOS process

A Deep-Learning Algorithm-Enhanced Electrocardiogram Interpretation for Detecting Pulmonary Embolism

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