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Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays

IEEE transactions on circuits and systems. II, Express briefs, 2019-05, Vol.66 (5), p.748-752

2019

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Sainte Face, visage de Dieu, visage de l’homme dans l’art contemporain (xixe - xxie siècle)

2015

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Modelling of vertical and ferroelectric junctionless technology for efficient 3D neural network compute cube dedicated to embedded artificial intelligence

2021 IEEE International Electron Devices Meeting (IEDM), 2021, p.15.6.1-15.6.4

2021

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L'engagement et l'émancipation : Ouvrage offert à Jacqueline Sainclivier

2015

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SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures

2015 15th Non-Volatile Memory Technology Symposium (NVMTS), 2015, p.1-4

2015

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Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop

2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, p.1-4

2017

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New perspectives for multicore architectures using advanced technologies

2016 IEEE International Electron Devices Meeting (IEDM), 2016, p.35.1.1-35.1.4

2016

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Vertical CBRAM (V-CBRAM): From Experimental Data to Design Perspectives

2016 IEEE 8th International Memory Workshop (IMW), 2016, p.1-4

2016

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Functionality and reliability of resistive RAM (RRAM) for non-volatile memory applications

2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2016, p.1-2

2016

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Architecture, design and technology guidelines for crosspoint memories

2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2017, p.55-60

2017

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RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density Considerations

2018 Conference on Design of Circuits and Integrated Systems (DCIS), 2018, p.1-6

2018

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In-depth investigation of programming and reading operations in RRAM cells integrated with Ovonic Threshold Switching (OTS) selectors

2017 IEEE International Electron Devices Meeting (IEDM), 2017, p.2.3.1-2.3.4

2017

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Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures

2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 2016, p.7-12

2016

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High density emerging resistive memories: What are the limits?

2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), 2017, p.1-4

2017

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Advanced memory solutions for emerging circuits and systems

2017 IEEE International Electron Devices Meeting (IEDM), 2017, p.19.4.1-19.4.4

2017

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Self-Rectifying Behavior and Analog Switching under Identical Pulses Using Tri-Layer RRAM Crossbar Array for Neuromorphic Systems

2017 IEEE International Memory Workshop (IMW), 2017, p.1-4

2017

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Development of a digital tool for the simulation of a readout system dedicated for neutrons discrimination

2014 15th Latin American Test Workshop - LATW, 2014, p.1-6

2014

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CBRAM corner analysis for robust design solutions

2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS), 2014, p.1-4

2014

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Eczéma paradoxal sous biothérapie ciblant l’axe IL-5/IL-5R

Annales de Dermatologie et de Vénéréologie - FMC, 2022-11, Vol.2 (8), p.A64

2022

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Traduire entre les langues chinoise et française: Un exercice d’interprétation

Bergeret Curien, Annie

2018

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Les cardinaux entre Cour et Curie: une élite romaine (1775-2015)

2017

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BLADE: An in-Cache Computing Architecture for Edge Devices

IEEE transactions on computers, 2020-09, Vol.69 (9), p.1349-1363

2020

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An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs

IEEE transactions on very large scale integration (VLSI) systems, 2024-06, Vol.32 (6), p.1018-1031

2024

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Switching Event Detection and Self-Termination Programming Circuit for Energy Efficient ReRAM Memory Arrays

Sainte Face, visage de Dieu, visage de l’homme dans l’art contemporain (xixe - xxie siècle)

Modelling of vertical and ferroelectric junctionless technology for efficient 3D neural network compute cube dedicated to embedded artificial intelligence

L'engagement et l'émancipation : Ouvrage offert à Jacqueline Sainclivier

SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures

Choisir Paris : les grandes donations aux musées de la Ville de Paris

Design methodology for area and energy efficient OxRAM-based non-volatile flip-flop

New perspectives for multicore architectures using advanced technologies

Vertical CBRAM (V-CBRAM): From Experimental Data to Design Perspectives

Functionality and reliability of resistive RAM (RRAM) for non-volatile memory applications

Architecture, design and technology guidelines for crosspoint memories

RRAM Crossbar Arrays for Storage Class Memory Applications: Throughput and Density Considerations

In-depth investigation of programming and reading operations in RRAM cells integrated with Ovonic Threshold Switching (OTS) selectors

Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures

High density emerging resistive memories: What are the limits?

Advanced memory solutions for emerging circuits and systems

Self-Rectifying Behavior and Analog Switching under Identical Pulses Using Tri-Layer RRAM Crossbar Array for Neuromorphic Systems

Development of a digital tool for the simulation of a readout system dedicated for neutrons discrimination

CBRAM corner analysis for robust design solutions

In partibus fidelium ». Missions du Levant et connaissance de l’Orient chrétien (XIXe-XXIe siècles)

Eczéma paradoxal sous biothérapie ciblant l’axe IL-5/IL-5R

Traduire entre les langues chinoise et française: Un exercice d’interprétation

Les cardinaux entre Cour et Curie: une élite romaine (1775-2015)

BLADE: An in-Cache Computing Architecture for Edge Devices

An Energy Efficient Soft SIMD Microarchitecture and Its Application on Quantized CNNs

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