UB Paderborn / Katalog / Suche / in CDI

Sortiert nach

Einfacher Volltextzugriff von (fast) überall

Installieren Sie die LibKey Nomad-Browsererweiterung und erhalten Sie von vielen Webseiten einfachen Zugriff auf lizenzierte Volltexte oder Open Access Publikationen. Mehr erfahren...

Active temporal multiplexing of indistinguishable heralded single photons

Nature communications, 2016-03, Vol.7 (1), p.10853-10853, Article 10853

2016

Volltextzugriff (PDF)

Indistinguishable heralded single photon generation via relative temporal multiplexing of two sources

Optics express, 2017-10, Vol.25 (21), p.26067-26075

2017

Volltextzugriff (PDF)

A microcoded elliptic curve processor using FPGA technology

IEEE transactions on very large scale integration (VLSI) systems, 2002-10, Vol.10 (5), p.550-559

2002

Volltextzugriff (PDF)

Analysis of the endocytic pathway mediating the infectious entry of mosquito-borne flavivirus West Nile into Aedes albopictus mosquito (C6/36) cells

Virology (New York, N.Y.), 2006-06, Vol.349 (2), p.463-475

2006

Volltextzugriff (PDF)

High performance physical random number generator

IET computers & digital techniques, 2007-07, Vol.1 (4), p.349-352

2007

Volltextzugriff (PDF)

FPGA implementation of biologically-inspired auto-associative memory

Electronics letters, 2012-02, Vol.48 (3), p.148-149

2012

Volltextzugriff (PDF)

A Smith-Waterman Systolic Cell

Field Programmable Logic and Application, 2003, p.375-384

2003

Volltextzugriff (PDF)

Compact and reconfigurable silicon nitride time-bin entanglement circuit

Optica, 2015-08, Vol.2 (8), p.724

2015

Volltextzugriff (PDF)

An FPGA Chip Identification Generator Using Configurable Ring Oscillators

IEEE transactions on very large scale integration (VLSI) systems, 2012-12, Vol.20 (12), p.2198-2207

2012

Volltextzugriff (PDF)

A hardware Gaussian noise generator using the Box-Muller method and its error analysis

IEEE transactions on computers, 2006-06, Vol.55 (6), p.659-671

2006

Volltextzugriff (PDF)

Degradation of Sub-Threshold Slope in Ultra-Scaled MOSFETs due to Energy Filtering at Source Contact

2019 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2019, p.1-3

2019

Volltextzugriff (PDF)

Optimizing Floating Point Units in Hybrid FPGAs

IEEE transactions on very large scale integration (VLSI) systems, 2012-07, Vol.20 (7), p.1295-1303

2012

Volltextzugriff (PDF)

A hardware Gaussian noise generator using the Wallace method

IEEE transactions on very large scale integration (VLSI) systems, 2005-08, Vol.13 (8), p.911-920

2005

Volltextzugriff (PDF)

An Analytical Model Relating FPGA Architecture to Logic Density and Depth

IEEE transactions on very large scale integration (VLSI) systems, 2011-12, Vol.19 (12), p.2229-2242

2011

Volltextzugriff (PDF)

Architecture and Design Flow for a Highly Efficient Structured ASIC

IEEE transactions on very large scale integration (VLSI) systems, 2013-03, Vol.21 (3), p.424-433

2013

Volltextzugriff (PDF)

Improving Carbon Nanotubes Sensor Time Response and Responsivity Using Constant-Power Activation

IEEE transactions on nanotechnology, 2012-05, Vol.11 (3), p.624-632

2012

Volltextzugriff (PDF)

FPGA implementation of biologically-inspired auto-associative memory

Electronics letters, 2012-02, Vol.48 (3), p.1-1

2012

Volltextzugriff (PDF)

Characterization of plasma membrane-associated proteins from Aedes albopictus mosquito (C6/36) cells that mediate West Nile virus binding and infection

Virology (New York, N.Y.), 2005-09, Vol.339 (2), p.249-260

2005

Volltextzugriff (PDF)

CPE: a parallel library for financial engineering applications

Computer (Long Beach, Calif.), 2005-10, Vol.38 (10), p.70-77

2005

Volltextzugriff (PDF)

A variable-radix digit-serial design methodology and its application to the discrete cosine transform

IEEE transactions on very large scale integration (VLSI) systems, 2003-02, Vol.11 (1), p.90-104

2003

Volltextzugriff (PDF)

A bitstream reconfigurable FPGA implementation of the WSAT algorithm

IEEE transactions on very large scale integration (VLSI) systems, 2001-02, Vol.9 (1), p.197-201

2001

Volltextzugriff (PDF)

Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA

Cryptographic Hardware and Embedded Systems — CHES 2001, 2001, p.333-347

2001

Volltextzugriff (PDF)

Fly — A Modifiable Hardware Compiler

Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, 2002, p.381-390

2002

Volltextzugriff (PDF)

FPGA based runtime configurable clause evaluator for SAT problems

Electronics letters, 1999-09, Vol.35 (19), p.1618-1619

1999

Volltextzugriff (PDF)

Monolithically integrated CMOS nanophotonic segmented Mach Zehnder transmitter

2017 Conference on Lasers and Electro-Optics (CLEO), 2017, p.1-2

2017

Volltextzugriff (PDF)

1 – 25 von 756

Suche als RSS-Feed

Suchergebnisse filtern

Filter anzeigen

Nur zeigen

Geprüft (Peer-Review)
(648)
Mit Volltextzugriff
(649)

Publikationsform

1 weiteren anzeigen...

Weniger anzeigen...

Sprache

Erscheinungsjahr

n.n

Thema

Science & Technology
(552)
Life Sciences & Biomedicine
(367)
Humans
(321)
Female
(192)
Male
(190)
Biological And Medical Sciences
(168)
Middle Aged
(148)
Adult
(145)
Technology
(143)
Medical Sciences
(138)
Aged
(104)
Physical Sciences
(84)
Animals
(83)
Engineering
(81)
Computer Science
(60)
Exact Sciences And Technology
(58)
Engineering, Electrical & Electronic
(56)
Oncology
(55)
Surgery
(47)
Treatment Outcome
(45)

15 weitere anzeigen...

Weniger anzeigen...

Neu hinzugefügt

... seit 90 Tagen
(3)

Menü

Weitere Dienste

Einstellungen

Active temporal multiplexing of indistinguishable heralded single photons

Indistinguishable heralded single photon generation via relative temporal multiplexing of two sources

A microcoded elliptic curve processor using FPGA technology

Analysis of the endocytic pathway mediating the infectious entry of mosquito-borne flavivirus West Nile into Aedes albopictus mosquito (C6/36) cells

High performance physical random number generator

FPGA implementation of biologically-inspired auto-associative memory

A Smith-Waterman Systolic Cell

Compact and reconfigurable silicon nitride time-bin entanglement circuit

An FPGA Chip Identification Generator Using Configurable Ring Oscillators

A hardware Gaussian noise generator using the Box-Muller method and its error analysis

Degradation of Sub-Threshold Slope in Ultra-Scaled MOSFETs due to Energy Filtering at Source Contact

Optimizing Floating Point Units in Hybrid FPGAs

A hardware Gaussian noise generator using the Wallace method

An Analytical Model Relating FPGA Architecture to Logic Density and Depth

Architecture and Design Flow for a Highly Efficient Structured ASIC

Improving Carbon Nanotubes Sensor Time Response and Responsivity Using Constant-Power Activation

FPGA implementation of biologically-inspired auto-associative memory

Characterization of plasma membrane-associated proteins from Aedes albopictus mosquito (C6/36) cells that mediate West Nile virus binding and infection

CPE: a parallel library for financial engineering applications

A variable-radix digit-serial design methodology and its application to the discrete cosine transform

A bitstream reconfigurable FPGA implementation of the WSAT algorithm

Tradeoffs in Parallel and Serial Implementations of the International Data Encryption Algorithm IDEA

Fly — A Modifiable Hardware Compiler

FPGA based runtime configurable clause evaluator for SAT problems

Monolithically integrated CMOS nanophotonic segmented Mach Zehnder transmitter

Suchergebnisse filtern