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A 0.039um2 high performance eDRAM cell based on 32nm High-K/Metal SOI technology

2010 International Electron Devices Meeting, 2010, p.27.5.1-27.5.4

2010

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A 0.1-[mu]m 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation

IEEE journal of solid-state circuits, 2007-01, Vol.42 (1), p.210-218

2007

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A 0.1-μm 1.8-V 256-Mb phase-change random access memory (PRAM) with 66-MHz synchronous burst-read operation

IEEE journal of solid-state circuits, 2007, Vol.42 (1), p.210-218

2007

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0.1 μm Gate length MODFETs with unity current gain cutoff frequency above 110 GHz

Electronics letters, 1988, Vol.24 (6), p.364-366

1988

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0.1-mu m Gate-length pseudomorphic HEMT' s

IEEE electron device letters, 1987-10, Vol.8 (10), p.489-491

1987

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0.1-nm narrow bandwidth transmission of a 2.5-Gb/s spectrum-sliced incoherent light channel using an all-optical bandwidth expansion technique at the receiver

IEEE photonics technology letters, 1998-10, Vol.10 (10), p.1501-1503

1998

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0.1 Reactive gas measurements at the Cape Verde Atmospheric Observatory

Geophysical research abstracts, 2007-01

2007

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A 0.1 /spl mu/m W-band HEMT production process for high yield and high performance low noise and power MMICs

Proceedings of 1994 IEEE GaAs IC Symposium, 1994, p.325-328

1994

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0.1 um n+-InAs-AlSb-InAs HEMT MMIC Technology for Phased-Array Applications

2007 IEEE Compound Semiconductor Integrated Circuits Symposium, 2007, p.1-4

2007

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0.1-μm gate-length pseudomorphic HEMT's

IEEE electron device letters, 1987, Vol.8 (10), p.489-491

1987

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0.1 μm In02Al08Sb-InAs HEMT low-noise amplifiers for ultralow-power applications

2007 IEEE International Electron Devices Meeting, 2007, p.617-620

2007

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In 0.11 Ga 0.89 N‐based p‐i‐n photodetector

Physica status solidi. C, 2009-06, Vol.6 (S2)

2009

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The 0.125 degree finite-volume general circulation model on the NASA Columbia supercomputer: Preliminary simulations of mesoscale vortices

Geophysical research letters, 2006-03, Vol.33 (5), p.L05801-n/a

2006

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A 0.13 /spl mu/m high-performance SOI logic technology with embedded DRAM for system-on-a-chip application

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001, p.22.3.1-22.3.4

2001

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A 0.13- \mu m CMOS 6 Gb/s/pin Memory Transceiver Using Pseudo-Differential Signaling for Removing Common-Mode Noise Due to SSN

IEEE journal of solid-state circuits, 2009-11, Vol.44 (11), p.3146-3162

2009

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0.15 μm gate length MHEMT technology for 77GHz automotive radar applications

2004

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A 0.15 /spl mu/m CMOS foundry technology with 0.1 /spl mu/m devices for high performance applications

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104), 2000, p.146-147

2000

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A 0.15 /spl mu/m DRAM technology node for 4 Gb DRAM

1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216), 1998, p.16-17

1998

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0.15 /spl mu/m InGaAs/AlGaAs/GaAs HEMT production process for high performance and high yield V-band power MMICs

GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995, 1995, p.105-108

1995

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0.15um Leff Buried Channel PFET Device Design

29th European Solid-State Device Research Conference, 1999, Vol.1, p.536-539

1999

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A 0.18 m CMOS 3.125-Gb/s Digitally Controlled Adaptive Line Equalizer with Feed-Forward Swing Control for Backplane Serial Link

IEICE transactions on electronics, 2006-10, Vol.E89-C (10), p.1454-1459

2006

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0.18 MG FLUOCINOLONE ACETONIDE INSERT FOR THE TREATMENT OF CHRONIC POSTOPERATIVE PSEUDOPHAKIC CYSTOID MACULAR EDEMA

Retina (Philadelphia, Pa.), 2023-06, Vol.43 (6), p.897-904

2023

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0.18 [micro sign]m 3.1–10.6 GHz CMOS UWB LNA with 11.4±0.4 dB gain and 100.7±17.4 ps group-delay

Electronics letters, 2007, Vol.43 (24), p.1359

2007

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0.18 mu m 3.1-10.6 GHz CMOS UWB LNA with 11.4 plus or minus 0.4 dB gain and 100.7 plus or minus 17.4 ps group-delay

Electronics letters, 2007-11, Vol.43 (24), p.1-1

2007

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A 0.18/spl mu/m CMOS fully integrated 6.25Gbps single aggressor multi-rate crosstalk cancellation IC for legacy backplane and interconnect applications

Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects, 2004, p.73-76

2004

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A 0.039um2 high performance eDRAM cell based on 32nm High-K/Metal SOI technology

A 0.1-[mu]m 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation

A 0.1-μm 1.8-V 256-Mb phase-change random access memory (PRAM) with 66-MHz synchronous burst-read operation

0.1 μm Gate length MODFETs with unity current gain cutoff frequency above 110 GHz

0.1-mu m Gate-length pseudomorphic HEMT' s

0.1-nm narrow bandwidth transmission of a 2.5-Gb/s spectrum-sliced incoherent light channel using an all-optical bandwidth expansion technique at the receiver

0.1 Reactive gas measurements at the Cape Verde Atmospheric Observatory

A 0.1 /spl mu/m W-band HEMT production process for high yield and high performance low noise and power MMICs

0.1 um n+-InAs-AlSb-InAs HEMT MMIC Technology for Phased-Array Applications

0.1-μm gate-length pseudomorphic HEMT's

0.1 μm In02Al08Sb-InAs HEMT low-noise amplifiers for ultralow-power applications

In 0.11 Ga 0.89 N‐based p‐i‐n photodetector

The 0.125 degree finite-volume general circulation model on the NASA Columbia supercomputer: Preliminary simulations of mesoscale vortices

A 0.13 /spl mu/m high-performance SOI logic technology with embedded DRAM for system-on-a-chip application

A 0.13- \mu m CMOS 6 Gb/s/pin Memory Transceiver Using Pseudo-Differential Signaling for Removing Common-Mode Noise Due to SSN

0.15 μm gate length MHEMT technology for 77GHz automotive radar applications

A 0.15 /spl mu/m CMOS foundry technology with 0.1 /spl mu/m devices for high performance applications

A 0.15 /spl mu/m DRAM technology node for 4 Gb DRAM

0.15 /spl mu/m InGaAs/AlGaAs/GaAs HEMT production process for high performance and high yield V-band power MMICs

0.15um Leff Buried Channel PFET Device Design

A 0.18 m CMOS 3.125-Gb/s Digitally Controlled Adaptive Line Equalizer with Feed-Forward Swing Control for Backplane Serial Link

0.18 MG FLUOCINOLONE ACETONIDE INSERT FOR THE TREATMENT OF CHRONIC POSTOPERATIVE PSEUDOPHAKIC CYSTOID MACULAR EDEMA

0.18 [micro sign]m 3.1–10.6 GHz CMOS UWB LNA with 11.4±0.4 dB gain and 100.7±17.4 ps group-delay

0.18 mu m 3.1-10.6 GHz CMOS UWB LNA with 11.4 plus or minus 0.4 dB gain and 100.7 plus or minus 17.4 ps group-delay

A 0.18/spl mu/m CMOS fully integrated 6.25Gbps single aggressor multi-rate crosstalk cancellation IC for legacy backplane and interconnect applications

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