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Design of a Low-Power and Low-Area 8-Bit Flash ADC Using a Double-Tail Comparator on 180 nm CMOS Process

Sensors (Basel, Switzerland), 2022-12, Vol.23 (1), p.76

2022

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Modelling and Designing of an All-Digital Resonate-And-Fire Neuron Circuit

IEEE access, 2023-01, Vol.11, p.1-1

2023

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Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias

IEEE transactions on circuits and systems. II, Express briefs, 2019-10, Vol.66 (10), p.1723-1727

2019

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Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA

Future internet, 2023-05, Vol.15 (5), p.186

2023

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Quick Boot of Trusted Execution Environment With Hardware Accelerators

IEEE access, 2020, Vol.8, p.74015-74023

2020

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MARSA: A Marketplace for Realtime Human Sensing Data

ACM transactions on Internet technology, 2016-08, Vol.16 (3), p.1-21

2016

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Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter

2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, p.1-1

2019

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A Probability Method to Estimate the State of a Digital Resonate-And-Fire Neuron without Running a Simulation

2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024, p.1-5

2024

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A CAM-Based Information Detection Hardware System for Fast Image Matching on FPGA

IEICE transactions on electronics, 2014-01, Vol.E97.C (1), p.65-76

2014

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Design of a 1.8-µVrms IRN 180-dB CMRR configurable low-noise 6-channel analog front-end for neural recording systems on 180nm CMOS process

IEICE Electronics Express, 2023-07, Vol.20 (13), p.20230218-20230218, Article 20.20230218

2023

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On improving agricultural IoT management process for fault detection

Journal of information and telecommunication (Print), 2017-07, Vol.1 (3), p.208-223

2017

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An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode

2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024, p.1-5

2024

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Seizure Classification Based on EEG Signal Analysis and CNN-Transformers Model

2023 International Conference on Advanced Technologies for Communications (ATC), 2023, p.140-145

2023

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A CAM-based Information Detection Hardware System for fast exact pattern matching

2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS), 2013, p.848-851

2013

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On Engineering Analytics for Elastic IoT Cloud Platforms

Service-Oriented Computing, p.267-281

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Design of a Configurable Low-Noise 1-Channel Analog Front-End for EEG Signal Recording on 180nm CMOS Process

2023 International Conference on Advanced Technologies for Communications (ATC), 2023, p.61-66

2023

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High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, p.1-5

2018

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Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB)

IEICE Electronics Express, 2020-10, Vol.17 (20), p.20200282-20200282

2020

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A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65 nm chip of 32-point DCT based on adaptive CORDIC

IEICE Electronics Express, 2019, Vol.16 (10), p.20190116-20190116

2019

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Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC

IEICE Electronics Express, 2018, Vol.15 (10), p.20180302-20180302

2018

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An FPGA-Based Information Detection Hardware System Employing Multi-Match Content Addressable Memory

IEICE transactions on fundamentals of electronics, communications and computer sciences, 2012, Vol.E95.A (10), p.1708-1717

2012

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Implementation of a Dual-core 64-bit RISC-V on 7nm FinFET Process

2021 International Conference on Advanced Technologies for Communications (ATC), 2021, p.28-32

2021

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FPGA-based frequent items counting using matrix of equality comparators

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017, p.285-288

2017

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iCOMOT -- A Toolset for Managing IoT Cloud Systems

2015 16th IEEE International Conference on Mobile Data Management, 2015, Vol.1, p.299-302

2015

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On Developing and Operating of Data Elasticity Management Process

Service-Oriented Computing, p.105-119

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Design of a Low-Power and Low-Area 8-Bit Flash ADC Using a Double-Tail Comparator on 180 nm CMOS Process

Modelling and Designing of an All-Digital Resonate-And-Fire Neuron Circuit

Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias

Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA

Quick Boot of Trusted Execution Environment With Hardware Accelerators

MARSA: A Marketplace for Realtime Human Sensing Data

Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter

A Probability Method to Estimate the State of a Digital Resonate-And-Fire Neuron without Running a Simulation

A CAM-Based Information Detection Hardware System for Fast Image Matching on FPGA

Design of a 1.8-µVrms IRN 180-dB CMRR configurable low-noise 6-channel analog front-end for neural recording systems on 180nm CMOS process

On improving agricultural IoT management process for fault detection

An Efficient Hiding Countermeasure with Xilinx MMCM Primitive in Spread Mode

Seizure Classification Based on EEG Signal Analysis and CNN-Transformers Model

A CAM-based Information Detection Hardware System for fast exact pattern matching

On Engineering Analytics for Elastic IoT Cloud Platforms

Design of a Configurable Low-Noise 1-Channel Analog Front-End for EEG Signal Recording on 180nm CMOS Process

High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC

Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB)

A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65 nm chip of 32-point DCT based on adaptive CORDIC

Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC

An FPGA-Based Information Detection Hardware System Employing Multi-Match Content Addressable Memory

Implementation of a Dual-core 64-bit RISC-V on 7nm FinFET Process

FPGA-based frequent items counting using matrix of equality comparators

iCOMOT -- A Toolset for Managing IoT Cloud Systems

On Developing and Operating of Data Elasticity Management Process

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