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A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology

IEEE journal of solid-state circuits, 2010-04, Vol.45 (4), p.909-920

2010

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Study of Subharmonically Injection-Locked PLLs

IEEE journal of solid-state circuits, 2009-05, Vol.44 (5), p.1539-1553

2009

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A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System With OOK Modulation and On-Board Antenna Assembly

IEEE journal of solid-state circuits, 2010-02, Vol.45 (2), p.264-275

2010

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A Fully-Integrated 77-GHz FMCW Radar Transceiver in 65-nm CMOS Technology

IEEE journal of solid-state circuits, 2010-12, Vol.45 (12), p.2746-2756

2010

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A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology

IEEE journal of solid-state circuits, 2008-06, Vol.43 (6), p.1414-1426

2008

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A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using Injection-Locking Technique

IEEE journal of solid-state circuits, 2008-03, Vol.43 (3), p.619-630

2008

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Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data

IEEE journal of solid-state circuits, 2008-09, Vol.43 (9), p.2120-2133

2008

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A 94 GHz 3D Image Radar Engine With 4TX/4RX Beamforming Scan Technique in 65 nm CMOS Technology

IEEE journal of solid-state circuits, 2015-03, Vol.50 (3), p.656-668

2015

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A Fully-Integrated 40-Gb/s Transceiver in 65-nm CMOS Technology

IEEE journal of solid-state circuits, 2012-03, Vol.47 (3), p.627-640

2012

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4×25 Gb/s Transceiver With Optical Front-end for 100 GbE System in 65 nm CMOS Technology

IEEE journal of solid-state circuits, 2015-02, Vol.50 (2), p.573-585

2015

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A 40-Gb/s clock and data recovery circuit in 0.18-μm CMOS technology

IEEE journal of solid-state circuits, 2003-12, Vol.38 (12), p.2181-2190

2003

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Analysis and modeling of bang-bang clock and data recovery circuits

IEEE journal of solid-state circuits, 2004-09, Vol.39 (9), p.1571-1580

2004

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A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition

IEEE journal of solid-state circuits, 2009-12, Vol.44 (12), p.3590-3602

2009

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A 20-Gb/s adaptive equalizer in 0.13-μm CMOS technology

IEEE journal of solid-state circuits, 2006-09, Vol.41 (9), p.2058-2066

LEE, Jri

2006

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W -Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology

IEEE journal of solid-state circuits, 2011-12, Vol.46 (12), p.3033-3046

2011

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A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-/spl mu/m CMOS technology

IEEE journal of solid-state circuits, 2006-03, Vol.41 (3), p.566-573

Lee, Jri

2006

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A 2 \,\times\, 25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet

IEEE journal of solid-state circuits, 2010-11, Vol.45 (11), p.2421-2432

2010

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High-speed circuit designs for transmitters in broadband data links

IEEE journal of solid-state circuits, 2006-05, Vol.41 (5), p.1004-1015

LEE, Jri

2006

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A low-power fully integrated 60GHz transceiver system with OOK modulation and on-board antenna assembly

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2009, p.316-317,317a

2009

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A fully integrated 77GHz FMCW radar system in 65nm CMOS

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010, p.216-217

2010

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100Gb/s ethernet chipsets in 65nm CMOS technology

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, p.120-121

2013

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A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-μm CMOS technology

IEEE journal of solid-state circuits, 2006-03, Vol.41 (3), p.566-573

LEE, Jri

2006

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A 94GHz 3D-image radar engine with 4TX/4RX beamforming scan technique in 65nm CMOS

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, p.146-147

2013

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Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies

IEEE journal of solid-state circuits, 2015-09, Vol.50 (9), p.2061-2073

2015

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A 79-GHz bidirectional pulse radar system with injection-regenerative receiver in 65 nm CMOS

2014 IEEE Radio Frequency Integrated Circuits Symposium, 2014, p.303-306

2014

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A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology

Study of Subharmonically Injection-Locked PLLs

A Low-Power Low-Cost Fully-Integrated 60-GHz Transceiver System With OOK Modulation and On-Board Antenna Assembly

A Fully-Integrated 77-GHz FMCW Radar Transceiver in 65-nm CMOS Technology

A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology

A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using Injection-Locking Technique

Design and Comparison of Three 20-Gb/s Backplane Transceivers for Duobinary, PAM4, and NRZ Data

A 94 GHz 3D Image Radar Engine With 4TX/4RX Beamforming Scan Technique in 65 nm CMOS Technology

A Fully-Integrated 40-Gb/s Transceiver in 65-nm CMOS Technology

4×25 Gb/s Transceiver With Optical Front-end for 100 GbE System in 65 nm CMOS Technology

A 40-Gb/s clock and data recovery circuit in 0.18-μm CMOS technology

Analysis and modeling of bang-bang clock and data recovery circuits

A 20-Gb/s Full-Rate Linear Clock and Data Recovery Circuit With Automatic Frequency Acquisition

A 20-Gb/s adaptive equalizer in 0.13-μm CMOS technology

W -Band BPSK and QPSK Transceivers With Costas-Loop Carrier Recovery in 65-nm CMOS Technology

A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-/spl mu/m CMOS technology

A 2 \,\times\, 25-Gb/s Receiver With 2:5 DMUX for 100-Gb/s Ethernet

High-speed circuit designs for transmitters in broadband data links

A low-power fully integrated 60GHz transceiver system with OOK modulation and on-board antenna assembly

A fully integrated 77GHz FMCW radar system in 65nm CMOS

100Gb/s ethernet chipsets in 65nm CMOS technology

A 3-to-8-GHz fast-hopping frequency synthesizer in 0.18-μm CMOS technology

A 94GHz 3D-image radar engine with 4TX/4RX beamforming scan technique in 65nm CMOS

Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies

A 79-GHz bidirectional pulse radar system with injection-regenerative receiver in 65 nm CMOS

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