UB Paderborn / Katalog / Suche / in CDI

Thermal Modeling of 3-D Stacked DRAM Over SiGe HBT BiCMOS CPU

IEEE access, 2015-01, Vol.3, p.43-54

2015

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140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology

IEEE journal of solid-state circuits, 2015-11, Vol.50 (11), p.2703-2713

2015

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A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology

IEEE journal of solid-state circuits, 2010-02, Vol.45 (2), p.380-390

2010

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A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration

IEEE transactions on very large scale integration (VLSI) systems, 2010-06, Vol.18 (6), p.967-977

2010

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Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology

IEEE transactions on circuits and systems. II, Express briefs, 2014-03, Vol.61 (3), p.178-182

2014

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Carry Chains for Ultra High-Speed SiGe HBT Adders

IEEE transactions on circuits and systems. I, Regular papers, 2011-09, Vol.58 (9), p.2201-2210

2011

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Design of BiCMOS SRAMs for high-speed SiGe applications

IET circuits, devices & systems, 2014-11, Vol.8 (6), p.487-498

2014

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Internet-based electronics manufacturing troubleshooting tool for surface mount PCB assembly

International journal of advanced manufacturing technology, 2006-01, Vol.27 (5-6), p.561-567

2006

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A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits

IEEE transactions on very large scale integration (VLSI) systems, 2007-09, Vol.15 (9), p.1051-1054

2007

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Integration of cryocooled superconducting analog-to-digital converter and SiGe output amplifier

IEEE transactions on applied superconductivity, 2003-06, Vol.13 (2), p.477-483

2003

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Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks

Proceedings of the IEEE, 2009-01, Vol.97 (1), p.108-122

2009

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A 5–10 GHz SiGe BiCMOS FPGA with new configurable logic block

Microprocessors and microsystems, 2005-04, Vol.29 (2), p.121-131

2005

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A 10 GHz 4:1 MUX and 1:4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC

Integration (Amsterdam), 2005, Vol.38 (3), p.525-540

2005

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A 10GHz 4:1 MUX and 1:4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC

Integration (Amsterdam), 2005-01, Vol.38 (3), p.525-540

2005

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Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory

Field Programmable Logic and Application, 2003, p.11-20

2003

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Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks : Simulations indicate that 3-D stacking of memory chips can overcome memory limitations on computer processing by allowing for faster clock rates or improved transfer of data and address information: 3-D Integration Technologies

Proceedings of the IEEE, 2009, Vol.97 (1), p.108-122

2009

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SiGe HBT Microprocessor Core Test Vehicle

Proceedings of the IEEE, 2005-09, Vol.93 (9), p.1669-1678

2005

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Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs

Field-Programmable Logic and Applications, 2001, p.59-69

2001

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Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques

Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, 2002, p.414-423

2002

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SiGe HBT microprocessor core test vehicle: Special issue on silicon germanium - advanced technology, modeling, and design

Proceedings of the IEEE, 2005, Vol.93 (9), p.1669-1678

2005

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A 3-tier, 3-D FD-SOI SRAM macro

2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial, 2008, p.277-280

2008

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Intelligent simulation environment for electronics remanufacturing systems

IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium (IEEE Cat. No.04CH37585), 2004, p.160-164

2004

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A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology

Great Lakes Symposium on VLSI: Proceedings of the 13th ACM Great Lakes symposium on VLSI; 28-29 Apr. 2003, 2003, p.37-40

2003

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A 5–10GHz SiGe BiCMOS FPGA with new configurable logic block

Microprocessors and microsystems, 2005-04, Vol.29 (2-3), p.121-131

2005

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A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's

IEEE transactions on very large scale integration (VLSI) systems, 1998-03, Vol.6 (1), p.52-55

1998

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Thermal Modeling of 3-D Stacked DRAM Over SiGe HBT BiCMOS CPU

140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology

A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology

A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration

Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology

Carry Chains for Ultra High-Speed SiGe HBT Adders

Design of BiCMOS SRAMs for high-speed SiGe applications

Internet-based electronics manufacturing troubleshooting tool for surface mount PCB assembly

A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits

Integration of cryocooled superconducting analog-to-digital converter and SiGe output amplifier

Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks

A 5–10 GHz SiGe BiCMOS FPGA with new configurable logic block

A 10 GHz 4:1 MUX and 1:4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC

A 10GHz 4:1 MUX and 1:4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC

Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory

SiGe HBT Microprocessor Core Test Vehicle

Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs

Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques

SiGe HBT microprocessor core test vehicle: Special issue on silicon germanium - advanced technology, modeling, and design

A 3-tier, 3-D FD-SOI SRAM macro

Intelligent simulation environment for electronics remanufacturing systems

A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology

A 5–10GHz SiGe BiCMOS FPGA with new configurable logic block

A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's

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