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Performance Tradeoffs in the Design of Low-Power SRAM Arrays for Implantable Devices

Journal of low-power electronics, 2018-03, Vol.14 (1), p.18-27

2018

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Static Noise Margin Optimized 11nm Shorted-Gate and Independent-Gate Low Power 6T FINFET SRAM Topologies

International journal of VLSI design & communication systems, 2018-10, Vol.9 (5), p.1-19

2018

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An Ultra-Low Power Charge Redistribution Successive Approximation Register A/D Converter for Biomedical Applications

Journal of low-power electronics, 2016-12, Vol.12 (4), p.385-393

2016

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An Ultra-Low Power Robust Koggestone Adder at Sub-Threshold Voltages for Implantable Bio-Medical Devices

International journal of VLSI design & communication systems, 2017-12, Vol.8 (6), p.1-13

2017

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A quantitative performance analysis of FinFET based multiplier circuits

2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), 2016, p.1-4

2016

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Compact, low cost CMOS integrated SPR biosensor system

2013 IEEE SENSORS, 2013, p.1-4

2013

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Improvised NanoSPR biosensor system utilizing gold nanorods and nanohole array film

2012 IEEE International Symposium on Circuits and Systems (ISCAS), 2012, p.2397-2400

2012

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A simple and robust self-reset CMOS image sensor

2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 2010, p.680-683

2010

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A 105.6dB DR and 65dB peak SNR self-reset CMOS image sensor using a Schmitt trigger circuit

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), 2011, p.1-4

2011

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Nanoscale biosensor chip

2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 2010, p.268-271

2010

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A comparative analysis of coarse-grain and fine-grain power gating for FPGA lookup tables

2009 52nd IEEE International Midwest Symposium on Circuits and Systems, 2009, p.507-510

2009

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Ultra Low Power Circuits for Implantable Cardiac Devices

Venkataswamy, Santosh Kumar Koppa

2017

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A high sensitive SPR biosensor system utilizing gold nanorods

2011 IEEE Biomedical Circuits and Systems Conference (BioCAS), 2011, p.309-312

2011

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Performance tradeoff of leakage reduction techniques in nanoscale CMOS circuits

Koppa Venkataswamy, Santosh Kumar

2009

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Topology selection of FPGA look-up tables for low-leakage operation

2009 European Conference on Circuit Theory and Design, 2009, p.73-76

2009

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Performance Tradeoffs in the Design of Low-Power SRAM Arrays for Implantable Devices

Static Noise Margin Optimized 11nm Shorted-Gate and Independent-Gate Low Power 6T FINFET SRAM Topologies

An Ultra-Low Power Charge Redistribution Successive Approximation Register A/D Converter for Biomedical Applications

An Ultra-Low Power Robust Koggestone Adder at Sub-Threshold Voltages for Implantable Bio-Medical Devices

A quantitative performance analysis of FinFET based multiplier circuits

Compact, low cost CMOS integrated SPR biosensor system

Improvised NanoSPR biosensor system utilizing gold nanorods and nanohole array film

A simple and robust self-reset CMOS image sensor

A 105.6dB DR and 65dB peak SNR self-reset CMOS image sensor using a Schmitt trigger circuit

Nanoscale biosensor chip

A comparative analysis of coarse-grain and fine-grain power gating for FPGA lookup tables

Ultra Low Power Circuits for Implantable Cardiac Devices

A high sensitive SPR biosensor system utilizing gold nanorods

Performance tradeoff of leakage reduction techniques in nanoscale CMOS circuits

Topology selection of FPGA look-up tables for low-leakage operation

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