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Self-selective van der Waals heterostructures for large scale memory array

Nature communications, 2019-07, Vol.10 (1), p.3161-7, Article 3161

2019

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CMOS Clock-Gated Synchronous Up/Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-Flop

IEEE transactions on circuits and systems. I, Regular papers, 2023-12, Vol.70 (12), p.5316-5327

2023

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IEEE_Xplore

Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning

IEEE transactions on circuits and systems. I, Regular papers, 2022-09, Vol.69 (9), p.3632-3642

2022

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IEEE_Xplore

In-sensor reservoir computing for language learning via two-dimensional memristors

Science advances, 2021-05, Vol.7 (20)

2021

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Low-Power High-Speed Sense-Amplifier-Based Flip-Flops with Conditional Bridging

IEEE access, 2023-01, Vol.11, p.1-1

2023

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A Fast Response PWM Buck Converter With Active Ramp Tracking Control in a Load Transient Period

IEEE transactions on circuits and systems. II, Express briefs, 2019-03, Vol.66 (3), p.467-471

2019

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IEEE_Xplore

How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation

IEEE transactions on circuits and systems. I, Regular papers, 2021-12, Vol.68 (12), p.4837-4850

2021

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IEEE_Xplore

Linearity Enhancement of VCO-Based Continuous-Time Delta-Sigma ADCs Using Digital Feedback Residue Quantization

Electronics (Basel), 2021-11, Vol.10 (22), p.2773

2021

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A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface

IEEE journal of solid-state circuits, 2017-06, Vol.52 (6), p.1563-1575

2017

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IEEE_Xplore

High-Speed Rail-to-Rail Class-AB Buffer Amplifier with Compact, Adaptive Biasing for FPD Applications

Electronics (Basel), 2020-12, Vol.9 (12), p.2018

2020

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High-Speed Column Driver IC Having Buffer Amplifier with Embedded Isolation Switch and Compact Adaptive Biasing for Flat-Panel Displays

Electronics (Basel), 2021-09, Vol.10 (18), p.2309

2021

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High-Efficiency DC–DC Converter with Charge-Recycling Gate-Voltage Swing Control

Energies (Basel), 2019-03, Vol.12 (5), p.899

2019

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Conditional-Boosting Flip-Flop for Near-Threshold Voltage Application

IEEE transactions on very large scale integration (VLSI) systems, 2017-02, Vol.25 (2), p.779-782

2017

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IEEE_Xplore

Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control

IEEE transactions on circuits and systems. II, Express briefs, 2013-10, Vol.60 (10), p.712-716

2013

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IEEE_Xplore

A Minimum Energy Tracking Loop with Accurate Energy Sensing and Hierarchical Tracking

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2020, 20(4), 94, pp.311-319

2020

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Double-sampled ΔΣ modulator with 1.5-bit FIR feedback DAC for reduced noise folding and increased power efficiency

Electronics letters, 2016-04, Vol.52 (8), p.598-600

2016

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Widely Tunable Adaptive Resolution-controlled Read-sensing Reference Current Generation for Reliable PRAM Data Read at Scaled Technologies

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2017, 17(3), 75, pp.363-369

2017

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Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM

IEEE journal of solid-state circuits, 2011-10, Vol.46 (10), p.2396-2405

2011

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IEEE_Xplore

Ultra-fast Adaptive Frequency-controlled Hysteretic Buck Converter for Portable Devices

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16(5), 71, pp.615-623

2016

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Adding Distance Information to Self-Supervised Learning for rich Representations

2023 IEEE International Conference on Image Processing (ICIP), 2023, p.1270-1274

2023

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A Polymorphic Memtransistor with Tunable Metallic and Semiconducting Channel

Advanced materials (Weinheim), 2023-04, Vol.35 (15), p.e2209089-n/a

2023

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CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction

IEEE transactions on circuits and systems. II, Express briefs, 2009-01, Vol.56 (1), p.11-15

2009

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IEEE_Xplore

Low-Voltage CMOS Differential Logic Style With Supply Voltage Approaching Device Threshold

IEEE transactions on circuits and systems. II, Express briefs, 2012-03, Vol.59 (3), p.173-177

2012

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IEEE_Xplore

Conditional-capture flip-flop for statistical power reduction

IEEE journal of solid-state circuits, 2001-08, Vol.36 (8), p.1263-1271

2001

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IEEE_Xplore

Current-Integrating DFE with Sub-UI ISI Cancellation for Multi-Drop Channels

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16(1), 67, pp.112-117

2016

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Self-selective van der Waals heterostructures for large scale memory array

CMOS Clock-Gated Synchronous Up/Down Counter With High-Speed Local Clock Generation and Compact Toggle Flip-Flop

Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning

In-sensor reservoir computing for language learning via two-dimensional memristors

Low-Power High-Speed Sense-Amplifier-Based Flip-Flops with Conditional Bridging

A Fast Response PWM Buck Converter With Active Ramp Tracking Control in a Load Transient Period

How to Build a Memristive Integrate-and-Fire Model for Spiking Neuronal Signal Generation

Linearity Enhancement of VCO-Based Continuous-Time Delta-Sigma ADCs Using Digital Feedback Residue Quantization

A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface

High-Speed Rail-to-Rail Class-AB Buffer Amplifier with Compact, Adaptive Biasing for FPD Applications

High-Speed Column Driver IC Having Buffer Amplifier with Embedded Isolation Switch and Compact Adaptive Biasing for Flat-Panel Displays

High-Efficiency DC–DC Converter with Charge-Recycling Gate-Voltage Swing Control

Conditional-Boosting Flip-Flop for Near-Threshold Voltage Application

Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control

A Minimum Energy Tracking Loop with Accurate Energy Sensing and Hierarchical Tracking

Double-sampled ΔΣ modulator with 1.5-bit FIR feedback DAC for reduced noise folding and increased power efficiency

Widely Tunable Adaptive Resolution-controlled Read-sensing Reference Current Generation for Reliable PRAM Data Read at Scaled Technologies

Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM

Ultra-fast Adaptive Frequency-controlled Hysteretic Buck Converter for Portable Devices

Adding Distance Information to Self-Supervised Learning for rich Representations

A Polymorphic Memtransistor with Tunable Metallic and Semiconducting Channel

CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction

Low-Voltage CMOS Differential Logic Style With Supply Voltage Approaching Device Threshold

Conditional-capture flip-flop for statistical power reduction

Current-Integrating DFE with Sub-UI ISI Cancellation for Multi-Drop Channels

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