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DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm

IEEE journal of solid-state circuits, 2024-03, Vol.59 (3), p.960-971

2024

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An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS

IEEE journal of solid-state circuits, 2023-04, Vol.58 (4), p.1117-1128

2023

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An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.68-69

2022

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A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS

IEEE journal of solid-state circuits, 2021-04, Vol.56 (4), p.1082-1092

2021

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A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS

2020 IEEE Symposium on VLSI Circuits, 2020, p.1-2

2020

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25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range

2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, p.396-398

2020

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A 2.9-33.0 TOPS/W Reconfigurable 1-D/2-D Compute-Near-Memory Inference Accelerator in 10-nm FinFET CMOS

IEEE solid-state circuits letters, 2020, Vol.3, p.118-121

2020

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A 9.0-TOPS/W Hash-Based Deep Neural Network Accelerator Enabling 128× Model Compression in 10-nm FinFET CMOS

IEEE solid-state circuits letters, 2020, Vol.3, p.338-341

2020

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A 4096-Neuron 1M-Synapse 3.8-pJ/SOP Spiking Neural Network With On-Chip STDP Learning and Sparse Weights in 10-nm FinFET CMOS

IEEE journal of solid-state circuits, 2019-04, Vol.54 (4), p.992-1002

2019

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RRAM Solutions for Stochastic Computing

Stochastic Computing: Techniques and Applications, 2019, p.153-164

2019

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A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS

2018 IEEE Symposium on VLSI Circuits, 2018, p.255-256

2018

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DIMCA: An Area-Efficient Digital In-Memory Computing Macro Featuring Approximate Arithmetic Hardware in 28 nm

An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS

An 8-core RISC-V Processor with Compute near Last Level Cache in Intel 4 CMOS

A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS

A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOS

25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range

A 2.9-33.0 TOPS/W Reconfigurable 1-D/2-D Compute-Near-Memory Inference Accelerator in 10-nm FinFET CMOS

A 9.0-TOPS/W Hash-Based Deep Neural Network Accelerator Enabling 128× Model Compression in 10-nm FinFET CMOS

A 4096-Neuron 1M-Synapse 3.8-pJ/SOP Spiking Neural Network With On-Chip STDP Learning and Sparse Weights in 10-nm FinFET CMOS

RRAM Solutions for Stochastic Computing

A 4096-Neuron 1M-Synapse 3.8PJ/SOP Spiking Neural Network with On-Chip STDP Learning and Sparse Weights in 10NM FinFET CMOS

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