UB Paderborn / Katalog / Suche / in CDI

Carbon tetrachloride-induced nephrotoxicity in rats: Protective role of Digera muricata

Journal of ethnopharmacology, 2009-02, Vol.122 (1), p.91-99

2009

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An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation

IET circuits, devices & systems, 2021-10, Vol.15 (7), p.670-685

2021

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Application mapping to mesh NoCs using a Tabu-search based swarm optimization

Microprocessors and microsystems, 2017-11, Vol.55, p.13-25

2017

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Statically adaptive multi FIFO buffer architecture for network on chip

Microprocessors and microsystems, 2015-02, Vol.39 (1), p.11-26

2015

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Embedded and Networking Systems: Design, Software, and Implementation

1, 2017

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Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems

IEEE transactions on very large scale integration (VLSI) systems, 2016-02, Vol.24 (2), p.465-478

2016

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Secure authentication scheme for passive C1G2 RFID tags

Computer networks (Amsterdam, Netherlands : 1999), 2012-01, Vol.56 (1), p.273-286

2012

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Low-cost authentication protocol for passive, computation capable RFID tags

Wireless networks, 2015-02, Vol.21 (2), p.565-580

2015

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Throughput-Oriented NoC Topology Generation and Analysis for High Performance SoCs

IEEE transactions on very large scale integration (VLSI) systems, 2009-10, Vol.17 (10), p.1433-1446

2009

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Impact of a community-based perinatal and newborn preventive care package on perinatal and neonatal mortality in a remote mountainous district in Northern Pakistan

BMC pregnancy and childbirth, 2015-04, Vol.15 (1), p.106-106, Article 106

2015

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High performance NoC synthesis using analytical modeling and simulation with optimal power and minimal IC area

Journal of systems architecture, 2013-11, Vol.59 (10), p.1348-1363

2013

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Designing power and performance optimal application-specific Network-on-Chip architectures

Microprocessors and microsystems, 2011-08, Vol.35 (6), p.523-534

2011

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A modeling tool for simulating and design of on-chip network systems

Microprocessors and microsystems, 2010-03, Vol.34 (2), p.84-95

2010

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Reconfigurable on-chip interconnection networks for high performance embedded SoC design

Journal of systems architecture, 2020-06, Vol.106, p.101711, Article 101711

2020

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Power and Performance Tabu Search Based Multicore Network-on-Chip Design

2010 39th International Conference on Parallel Processing Workshops, 2010, p.74-81

2010

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Power and Performance Analysis of Deep Neural Networks for Energy-aware Heterogeneous Systems

2020 IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2020, p.2184-2189

2020

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Congestion Aware Routing for On-Chip Communication in NoC Systems

Complex, Intelligent, and Software Intensive Systems, p.547-556

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Embedded and Networking Systems

2017

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Application Specific Reconfigurable SoC Interconnection Network Architecture

Architecture of Computing Systems – ARCS 2019, p.322-333

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Index-Based Round-Robin Arbiter for NoC Routers

2015 IEEE Computer Society Annual Symposium on VLSI, 2015, p.62-67

2015

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Dynamic VC Organization for Efficient NoC Communication

2015 IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015, p.151-158

2015

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Packet-based Adaptive Virtual Channel Configuration for NoC Systems

Procedia computer science, 2014, Vol.34, p.552-558

2014

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Content based indexing and retrieval in a digital library of Arabic scripts and calligraphy

Lecture notes in computer science, 2000, Vol.1923, p.14-23

2000

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Dynamic Virtual Channel Configuration for Efficient Multicore Systems

2014 Eighth International Conference on Complex, Intelligent and Software Intensive Systems, 2014, p.445-450

2014

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Secure RFID Authentication Protocol with Key Updating Technique

2013 22nd International Conference on Computer Communication and Networks (ICCCN), 2013, p.1-5

2013

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Carbon tetrachloride-induced nephrotoxicity in rats: Protective role of Digera muricata

An 8‐bit digital‐to‐time converter with pre‐skewing and time interpolation

Application mapping to mesh NoCs using a Tabu-search based swarm optimization

Statically adaptive multi FIFO buffer architecture for network on chip

Embedded and Networking Systems: Design, Software, and Implementation

Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems

Secure authentication scheme for passive C1G2 RFID tags

Low-cost authentication protocol for passive, computation capable RFID tags

Throughput-Oriented NoC Topology Generation and Analysis for High Performance SoCs

Impact of a community-based perinatal and newborn preventive care package on perinatal and neonatal mortality in a remote mountainous district in Northern Pakistan

High performance NoC synthesis using analytical modeling and simulation with optimal power and minimal IC area

Designing power and performance optimal application-specific Network-on-Chip architectures

A modeling tool for simulating and design of on-chip network systems

Reconfigurable on-chip interconnection networks for high performance embedded SoC design

Power and Performance Tabu Search Based Multicore Network-on-Chip Design

Power and Performance Analysis of Deep Neural Networks for Energy-aware Heterogeneous Systems

Congestion Aware Routing for On-Chip Communication in NoC Systems

Embedded and Networking Systems

Application Specific Reconfigurable SoC Interconnection Network Architecture

Index-Based Round-Robin Arbiter for NoC Routers

Dynamic VC Organization for Efficient NoC Communication

Packet-based Adaptive Virtual Channel Configuration for NoC Systems

Content based indexing and retrieval in a digital library of Arabic scripts and calligraphy

Dynamic Virtual Channel Configuration for Efficient Multicore Systems

Secure RFID Authentication Protocol with Key Updating Technique

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