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Pumping liquid metal at high temperatures up to 1,673 kelvin

Nature (London), 2017-10, Vol.550 (7675), p.199-203

2017

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Optimization strategies for simulated moving bed and PowerFeed processes

AIChE journal, 2006-04, Vol.52 (4), p.1343-1350

2006

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Tubulointerstitial nephritis with IgM-positive plasmacytoid large lymphocyte infiltration in a patient with primary biliary cirrhosis and Sjögren's syndrome

Clinical nephrology, 2010-07, Vol.74 (1), p.74-80

2010

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Formulation studies on mosquito coils containing natural pyrethrum

Acta horticulturae, 2017 (1169), p.41-46

2017

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Subthreshold current reduction for decoded-driver by self-reverse biasing (DRAMs)

IEEE journal of solid-state circuits, 1993-11, Vol.28 (11), p.1136-1144

1993

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256-Mb DRAM circuit technologies for file applications

IEEE journal of solid-state circuits, 1993-11, Vol.28 (11), p.1105-1113

1993

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A high-speed, small-area, threshold-voltage-mismatch compensation sense amplifier for gigabit-scale DRAM arrays

IEEE journal of solid-state circuits, 1993-07, Vol.28 (7), p.816-823

1993

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A circuit technology for sub-10-ns ECL 4-Mb BiCMOS DRAM's

IEEE journal of solid-state circuits, 1991-11, Vol.26 (11), p.1530-1537

1991

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A True 6F2 NOR Flash Memory Cell Technology - Impact of Floating Gate B4-Flash on NOR Scaling

2011 3rd IEEE International Memory Workshop (IMW), 2011, p.1-2

2011

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A charge recycle refresh for Gb-scale DRAM's in file applications

IEEE journal of solid-state circuits, 1994-06, Vol.29 (6), p.715-722

1994

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A 10k-Cycling Reliable 90nm Logic NVM "eCFlash" (Embedded CMOS Flash) Technology

2011 3rd IEEE International Memory Workshop (IMW), 2011, p.1-2

2011

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A 23-ns 1-Mb BiCMOS DRAM

IEEE journal of solid-state circuits, 1990-10, Vol.25 (5), p.1102-1111

1990

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Rapid remission of minimal change disease with angiotensin II antagonist treatment in a type 1 diabetic patient with no diabetic nephropathy

Clinical kidney journal, 2008-10, Vol.1 (5), p.375-376

2008

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Deep-submicrometer BiCMOS circuit technology for sub-10-ns ECL 4-Mb DRAM's

IEEE journal of solid-state circuits, 1992-04, Vol.27 (4), p.589-596

1992

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A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques

IEEE journal of solid-state circuits, 1989-06, Vol.24 (3), p.597-602

1989

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Comparison of CMOS and BiCMOS 1-Mbit DRAM performance

IEEE journal of solid-state circuits, 1989-06, Vol.24 (3), p.771-778

1989

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An experimental 1-Mbit BiCMOS DRAM

IEEE journal of solid-state circuits, 1987-10, Vol.22 (5), p.657-662

1987

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Power Reduction Techniques in Megabit DRAM's

IEEE journal of solid-state circuits, 1986-06, Vol.21 (3), p.381-389

1986

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Substrate current reduction techniques for BiCMOS DRAM

IEEE journal of solid-state circuits, 1989-10, Vol.24 (5), p.1381-1389

1989

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Effects of epinephrine and pilocarpine on oxygen uptake by the isolated submandibular acinar cells of rats treated with isoproterenol

Nippon Seirigaku Zasshi., 1983-06, Vol.45 (6), p.279

1983

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29-mm super(2), 1.8-V-only, 16-Mb DINOR flash memory with gate-protected-poly-diode (GPPD) charge pump

IEEE journal of solid-state circuits, 1999-11, Vol.34 (11), p.1551-1556

1999

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Linearizing Control of CSTR and Its Robust Stabilization by H∞ Controller

JOURNAL OF CHEMICAL ENGINEERING OF JAPAN, 1998, Vol.31(5), pp.780-786

1998

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Byte alterable embedded EEPROM with B4-HE architecture achieving 10usec programming and 57F2 cell size

2014 IEEE 6th International Memory Workshop (IMW), 2014, p.1-3

2014

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A 29-mm/sup 2/, 1.8-V-only, 16-Mb DINOR flash memory with gate-protected-poly-diode (GPPD) charge pump

IEEE journal of solid-state circuits, 1999-11, Vol.34 (11), p.1551-1556

1999

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A 29-mm(2), 1.8-V-only, 16-Mb DINOR flash memory withgate-protected-poly-diode (GPPD) charge pump

IEEE journal of solid-state circuits, 1999-11, Vol.34 (11), p.1551-1556

1999

Volltextzugriff (PDF)

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Pumping liquid metal at high temperatures up to 1,673 kelvin

Optimization strategies for simulated moving bed and PowerFeed processes

Tubulointerstitial nephritis with IgM-positive plasmacytoid large lymphocyte infiltration in a patient with primary biliary cirrhosis and Sjögren's syndrome

Formulation studies on mosquito coils containing natural pyrethrum

Subthreshold current reduction for decoded-driver by self-reverse biasing (DRAMs)

256-Mb DRAM circuit technologies for file applications

A high-speed, small-area, threshold-voltage-mismatch compensation sense amplifier for gigabit-scale DRAM arrays

A circuit technology for sub-10-ns ECL 4-Mb BiCMOS DRAM's

A True 6F2 NOR Flash Memory Cell Technology - Impact of Floating Gate B4-Flash on NOR Scaling

A charge recycle refresh for Gb-scale DRAM's in file applications

A 10k-Cycling Reliable 90nm Logic NVM "eCFlash" (Embedded CMOS Flash) Technology

A 23-ns 1-Mb BiCMOS DRAM

Rapid remission of minimal change disease with angiotensin II antagonist treatment in a type 1 diabetic patient with no diabetic nephropathy

Deep-submicrometer BiCMOS circuit technology for sub-10-ns ECL 4-Mb DRAM's

A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques

Comparison of CMOS and BiCMOS 1-Mbit DRAM performance

An experimental 1-Mbit BiCMOS DRAM

Power Reduction Techniques in Megabit DRAM's

Substrate current reduction techniques for BiCMOS DRAM

Effects of epinephrine and pilocarpine on oxygen uptake by the isolated submandibular acinar cells of rats treated with isoproterenol

29-mm super(2), 1.8-V-only, 16-Mb DINOR flash memory with gate-protected-poly-diode (GPPD) charge pump

Linearizing Control of CSTR and Its Robust Stabilization by H∞ Controller

Byte alterable embedded EEPROM with B4-HE architecture achieving 10usec programming and 57F2 cell size

A 29-mm/sup 2/, 1.8-V-only, 16-Mb DINOR flash memory with gate-protected-poly-diode (GPPD) charge pump

A 29-mm(2), 1.8-V-only, 16-Mb DINOR flash memory withgate-protected-poly-diode (GPPD) charge pump

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