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Study of Endurance Performance of SiO2 Interfacial Layer Scaling Through O Scavenging in Si Channel n-FeFET With Si:HfO2 Ferroelectric Layer

IEEE transactions on electron devices, 2024-08, Vol.71 (8), p.4619-4625

2024

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Linking Room- and Low-Temperature Electrical Performance of MOS Gate Stacks for Cryogenic Applications

IEEE electron device letters, 2022-05, Vol.43 (5), p.674-677

2022

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Experimental study of fat grafting under negative pressure for wounds with exposed bone

British journal of surgery, 2015-07, Vol.102 (8), p.998-1005

2015

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MOSFET Characterization with Reduced Supply Voltage at Low Temperatures for Power Efficiency Maximization

ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (ESSDERC), 2023, p.9-12

2023

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Tension band plating is less effective in achieving equalization of leg length

Journal of children's orthopaedics, 2018-12, Vol.12 (6), p.629-634

2018

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A Comprehensive Kinetical Modeling of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Energy Effects on Negative Capacitance FETs

2019 Symposium on VLSI Technology, 2019, p.T222-T223

2019

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How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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First Demonstration of Vertical Stacked Hetero-Oriented n-Ge (111)/p-Ge (100) CFET toward Mobility Balance Engineering

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.399-400

2022

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Extracting Device Parameters of TFTs With Ultrathin Channels at Low Temperatures by Particle Swarm Optimization

IEEE transactions on electron devices, 2024-08, Vol.71 (8), p.4717-4722

2024

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A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node

2018 IEEE Symposium on VLSI Technology, 2018, p.45-46

2018

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First Demonstration of CMOS Inverter and 6T-SRAM Based on GAA CFETs Structure for 3D-IC Applications

2019 IEEE International Electron Devices Meeting (IEDM), 2019, p.11.7.1-11.7.4

2019

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Synchrotron x-ray microbeam diagnostics of combinatorial synthesis

Applied physics letters, 1998-09, Vol.73 (13), p.1820-1822

1998

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Plasma Matrix Metalloproteinase-1 as a Prognostic Biomarker in Oral Cavity Squamous Cell Carcinoma

Cancer management and research, 2022-01, Vol.14, p.3459-3468

2022

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First Demonstration of Heterogeneous L-shaped Field Effect Transistor (LFET) for Angstrom Technology Nodes

2022 International Electron Devices Meeting (IEDM), 2022, p.20.2.1-20.2.4

2022

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Integration Design and Process of 3-D Heterogeneous 6T SRAM with Double Layer Transferred Ge/2Si CFET and IGZO Pass Gates for 42% Reduced Cell Size

2022 International Electron Devices Meeting (IEDM), 2022, p.20.5.1-20.5.4

2022

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Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION

2017 Symposium on VLSI Technology, 2017, p.T152-T153

2017

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First Demonstration of Defect Elimination for Cryogenic Ge FinFET CMOS Inverter Showing Steep Subthreshold Slope by Using Ge-on-Insulator Structure

2023 International Electron Devices Meeting (IEDM), 2023, p.1-4

2023

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P235. Predicting morbidity and mortality after surgical resection followed by microsurgical free tissue transfer in head and neck cancer patients with liver cirrhosis: The role of model for end-stage liver disease score

Oral oncology, 2011-07, Vol.47, p.S149-S149

2011

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Relationship between copper concentration and stress during electromigration in an Al(0.25 at. % Cu) conductor line

Journal of applied physics, 2003-03, Vol.93 (5), p.2516-2527

2003

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First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3D Integration with Dual Workfunction Gate for Ultra Low-power SRAM and RF Applications

2021 IEEE International Electron Devices Meeting (IEDM), 2021, p.34.4.1-34.4.4

2021

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Electromigration of copper in Al(0.25 at. % Cu) conductor lines

Journal of applied physics, 2001-03, Vol.89 (5), p.2588-2597

2001

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Study of Endurance Performance of SiO 2 Interfacial Layer Scaling Through O Scavenging in Si Channel n-FeFET With Si:HfO 2 Ferroelectric Layer

IEEE transactions on electron devices, 2024-08, Vol.71 (8), p.4619-4625

2024

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Ge nanowire FETs with HfZrOx ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability

2017 IEEE International Electron Devices Meeting (IEDM), 2017, p.15.4.1-15.4.4

2017

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Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications

2018 IEEE International Electron Devices Meeting (IEDM), 2018, p.21.4.1-21.4.4

2018

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Fabrication of \Omega -gated Negative Capacitance FinFETs and SRAM

2019 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2019, p.1-2

2019

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Study of Endurance Performance of SiO2 Interfacial Layer Scaling Through O Scavenging in Si Channel n-FeFET With Si:HfO2 Ferroelectric Layer

Linking Room- and Low-Temperature Electrical Performance of MOS Gate Stacks for Cryogenic Applications

Experimental study of fat grafting under negative pressure for wounds with exposed bone

MOSFET Characterization with Reduced Supply Voltage at Low Temperatures for Power Efficiency Maximization

Tension band plating is less effective in achieving equalization of leg length

A Comprehensive Kinetical Modeling of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Energy Effects on Negative Capacitance FETs

How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS Technology

First Demonstration of Vertical Stacked Hetero-Oriented n-Ge (111)/p-Ge (100) CFET toward Mobility Balance Engineering

Extracting Device Parameters of TFTs With Ultrathin Channels at Low Temperatures by Particle Swarm Optimization

A Comprehensive Study of Polymorphic Phase Distribution of Ferroelectric-Dielectrics and Interfacial Layer Effects on Negative Capacitance FETs for Sub-5 nm Node

First Demonstration of CMOS Inverter and 6T-SRAM Based on GAA CFETs Structure for 3D-IC Applications

Synchrotron x-ray microbeam diagnostics of combinatorial synthesis

Plasma Matrix Metalloproteinase-1 as a Prognostic Biomarker in Oral Cavity Squamous Cell Carcinoma

First Demonstration of Heterogeneous L-shaped Field Effect Transistor (LFET) for Angstrom Technology Nodes

Integration Design and Process of 3-D Heterogeneous 6T SRAM with Double Layer Transferred Ge/2Si CFET and IGZO Pass Gates for 42% Reduced Cell Size

Nano-scaled Ge FinFETs with low temperature ferroelectric HfZrOx on specific interfacial layers exhibiting 65% S.S. reduction and improved ION

First Demonstration of Defect Elimination for Cryogenic Ge FinFET CMOS Inverter Showing Steep Subthreshold Slope by Using Ge-on-Insulator Structure

P235. Predicting morbidity and mortality after surgical resection followed by microsurgical free tissue transfer in head and neck cancer patients with liver cirrhosis: The role of model for end-stage liver disease score

Relationship between copper concentration and stress during electromigration in an Al(0.25 at. % Cu) conductor line

First Demonstration of Heterogeneous IGZO/Si CFET Monolithic 3D Integration with Dual Workfunction Gate for Ultra Low-power SRAM and RF Applications

Electromigration of copper in Al(0.25 at. % Cu) conductor lines

Study of Endurance Performance of SiO 2 Interfacial Layer Scaling Through O Scavenging in Si Channel n-FeFET With Si:HfO 2 Ferroelectric Layer

Ge nanowire FETs with HfZrOx ferroelectric gate stack exhibiting SS of sub-60 mV/dec and biasing effects on ferroelectric reliability

Voltage Transfer Characteristic Matching by Different Nanosheet Layer Numbers of Vertically Stacked Junctionless CMOS Inverter for SoP/3D-ICs applications

Fabrication of \Omega -gated Negative Capacitance FinFETs and SRAM

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