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Investigation of Imprint in FE-HfO₂ and Its Recovery

IEEE transactions on electron devices, 2020-11, Vol.67 (11), p.4911-4917

2020

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IEEE_Xplore

First principles investigation of charge transition levels in monoclinic, orthorhombic, tetragonal, and cubic crystallographic phases of HfO2

Journal of applied physics, 2021-02, Vol.129 (8)

2021

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Towards Complete Recovery of Circuit Degradation by Annealing With On-Chip Heaters

IEEE electron device letters, 2023-02, Vol.44 (2), p.201-204

2023

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IEEE_Xplore

Evidence That Two Tightly Coupled Mechanisms Are Responsible for Negative Bias Temperature Instability in Oxynitride MOSFETs

IEEE transactions on electron devices, 2009-05, Vol.56 (5), p.1056-1062

2009

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IEEE_Xplore

Unveiling the Vulnerability of Oxide-Breakdown-Based PUF

IEEE electron device letters, 2024-05, Vol.45 (5), p.750-753

2024

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IEEE_Xplore

Statistics of Multiple Trapped Charges in the Gate Oxide of Deeply Scaled MOSFET Devices-Application to NBTI

IEEE electron device letters, 2010-05, Vol.31 (5), p.411-413

2010

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IEEE_Xplore

Compact Modeling of Multidomain Ferroelectric FETs: Charge Trapping, Channel Percolation, and Nucleation-Growth Domain Dynamics

IEEE transactions on electron devices, 2021-04, Vol.68 (4), p.2107-2115

2021

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IEEE_Xplore

Trapping of Hot Carriers in the Forksheet FET Wall: A TCAD Study

IEEE electron device letters, 2023-02, Vol.44 (2), p.197-200

2023

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IEEE_Xplore

Defect profiling in FEFET Si:HfO2 layers

Applied physics letters, 2020-11, Vol.117 (20)

2020

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A HydroDynamic Model for Trap-Assisted Tunneling Conduction in Ovonic Devices

IEEE transactions on electron devices, 2023-04, Vol.70 (4), p.1-7

2023

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IEEE_Xplore

Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P-V and I-V in HfO₂-Based Ferroelectric FET

IEEE transactions on electron devices, 2021-09, Vol.68 (9), p.4391-4396

2021

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IEEE_Xplore

High- k dielectrics for future generation memory devices (Invited Paper)

Microelectronic engineering, 2009-07, Vol.86 (7), p.1789-1795

2009

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Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory

Applied physics letters, 2014-02, Vol.104 (8)

2014

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The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability

2010 IEEE International Reliability Physics Symposium, 2010, p.16-25

2010

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IEEE_Xplore

Superior NBTI in High- k SiGe Transistors–Part I: Experimental

IEEE transactions on electron devices, 2017-05, Vol.64 (5), p.2092-2098

2017

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IEEE_Xplore

Process implications on the stability and reliability of 300 mm FAB MoS2 field-effect transistors

NPJ 2D materials and applications, 2024-02, Vol.8 (1), p.8-7, Article 8

2024

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Direct Measurement of Top and Sidewall Interface Trap Density in SOI FinFETs

IEEE electron device letters, 2007-03, Vol.28 (3), p.232-234

2007

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IEEE_Xplore

Superior NBTI in High-k SiGe Transistors-Part II: Theory

IEEE transactions on electron devices, 2017-05, Vol.64 (5), p.2099-2105

2017

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IEEE_Xplore

Poly-Si heaters for ultra-fast local temperature control of on-wafer test structures

Microelectronic engineering, 2014-02, Vol.114, p.47-51

2014

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NBTI Lifetime Prediction and Kinetics at Operation Bias Based on Ultrafast Pulse Measurement

IEEE transactions on electron devices, 2010-01, Vol.57 (1), p.228-237

2010

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IEEE_Xplore

Understanding negative bias temperature instability in the context of hole trapping (Invited Paper)

Microelectronic engineering, 2009-07, Vol.86 (7), p.1876-1882

2009

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Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability

IEEE transactions on electron devices, 2002-03, Vol.49 (3), p.500-506

2002

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IEEE_Xplore

Origin of NBTI variability in deeply scaled pFETs

2010 IEEE International Reliability Physics Symposium, 2010, p.26-32

2010

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IEEE_Xplore

Analysis of BTI in 300 mm integrated dual-gate WS2 FETs

2022 Device Research Conference (DRC), 2022, p.1-2

2022

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IEEE_Xplore

Dangling bond defects in silicon-passivated strained-Si1−xGex channel layers

Journal of materials science. Materials in electronics, 2020, Vol.31 (1), p.75-79

2020

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Investigation of Imprint in FE-HfO₂ and Its Recovery

First principles investigation of charge transition levels in monoclinic, orthorhombic, tetragonal, and cubic crystallographic phases of HfO2

Towards Complete Recovery of Circuit Degradation by Annealing With On-Chip Heaters

Evidence That Two Tightly Coupled Mechanisms Are Responsible for Negative Bias Temperature Instability in Oxynitride MOSFETs

Unveiling the Vulnerability of Oxide-Breakdown-Based PUF

Statistics of Multiple Trapped Charges in the Gate Oxide of Deeply Scaled MOSFET Devices-Application to NBTI

Compact Modeling of Multidomain Ferroelectric FETs: Charge Trapping, Channel Percolation, and Nucleation-Growth Domain Dynamics

Trapping of Hot Carriers in the Forksheet FET Wall: A TCAD Study

Defect profiling in FEFET Si:HfO2 layers

A HydroDynamic Model for Trap-Assisted Tunneling Conduction in Ovonic Devices

Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P-V and I-V in HfO₂-Based Ferroelectric FET

High- k dielectrics for future generation memory devices (Invited Paper)

Low leakage Ru-strontium titanate-Ru metal-insulator-metal capacitors for sub-20 nm technology node in dynamic random access memory

The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability

Superior NBTI in High- k SiGe Transistors–Part I: Experimental

Process implications on the stability and reliability of 300 mm FAB MoS2 field-effect transistors

Direct Measurement of Top and Sidewall Interface Trap Density in SOI FinFETs

Superior NBTI in High-k SiGe Transistors-Part II: Theory

Poly-Si heaters for ultra-fast local temperature control of on-wafer test structures

NBTI Lifetime Prediction and Kinetics at Operation Bias Based on Ultrafast Pulse Measurement

Understanding negative bias temperature instability in the context of hole trapping (Invited Paper)

Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability

Origin of NBTI variability in deeply scaled pFETs

Analysis of BTI in 300 mm integrated dual-gate WS2 FETs

Dangling bond defects in silicon-passivated strained-Si1−xGex channel layers

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