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Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array

IEEE transactions on electron devices, 2011-08, Vol.58 (8), p.2249-2256

2011

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Statistical Write Stability Characterization in SRAM Cells at Low Supply Voltage

IEEE transactions on electron devices, 2016-11, Vol.63 (11), p.4302-4308

2016

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Application of Piezoelectric PLLA Braided Cord as Wearable Sensor to Realize Monitoring System for Indoor Dogs with Less Physical or Mental Stress

Micromachines (Basel), 2023-01, Vol.14 (1), p.143

2023

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Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node

IEEE journal of solid-state circuits, 2007-06, Vol.42 (6), p.1362-1369

2007

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Comprehensive analysis of low-frequency noise variability components in bulk and fully depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistor

Japanese Journal of Applied Physics, 2018-04, Vol.57 (4S), p.4

2018

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Detailed analysis of minimum operation voltage of extraordinarily unstable cells in fully depleted silicon-on-buried-oxide six-transistor static random access memory

Japanese Journal of Applied Physics, 2015-04, Vol.54 (4S), p.4-1-04DC16-5

2015

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A 361nA thermal run-away immune VBB generator using dynamic substrate controlled charge pump for ultra low sleep current logic on 65nm SOTB

2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014, p.1-2

2014

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Thick-Strained-Si/Relaxed-SiGe Structure of High-Performance RF Power LDMOSFETs for Cellular Handsets

IEEE transactions on electron devices, 2006-12, Vol.53 (12), p.3136-3145

2006

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Impact of Oxide Thickness Fluctuation and Local Gate Depletion on Threshold Voltage Variation in Metal–Oxide–Semiconductor Field-Effect Transistors

Japanese Journal of Applied Physics, 2009-06, Vol.48 (6R), p.64504

2009

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High-Temperature Properties of Drain Current Variability in Scaled Field-Effect Transistors Analyzed by Decomposition Method

Japanese Journal of Applied Physics, 2011-04, Vol.50 (4), p.04DC08-04DC08-5

2011

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Ultralow-Power SOTB CMOS Technology Operating Down to 0.4 V

Journal of Low Power Electronics and Applications, 2014-04, Vol.4 (2), p.65-76

2014

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Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage in sub-0.4V regime

2015 Symposium on VLSI Technology (VLSI Technology), 2015, p.T38-T39

2015

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Consideration of Random Dopant Fluctuation Models for Accurate Prediction of Threshold Voltage Variation of Metal–Oxide–Semiconductor Field-Effect Transistors in 45 nm Technology and Beyond

Japanese Journal of Applied Physics, 2009-04, Vol.48 (4R), p.44502

2009

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Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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Deep-Trap Stress Induced Leakage Current Model for Nominal and Weak Oxides

Japanese Journal of Applied Physics, 2008-08, Vol.47 (8R), p.6208

2008

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Statistical p–n Junction Leakage Model via Trap Level Fluctuation for Refresh-Time-Oriented Dynamic Random Access Memory Design

Japanese Journal of Applied Physics, 2008-07, Vol.47 (7R), p.5304

2008

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High-Temperature Properties of Drain Current Variability in Scaled Field-Effect Transistors Analyzed by Decomposition Method

Japanese Journal of Applied Physics, 2011-04, Vol.50 (4S), p.4

2011

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New physical model to explain logarithmic time dependence of data retention in flash EEPROM

Applied surface science, 2008-07, Vol.254 (19), p.6174-6176

2008

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SOTB (Silicon on Thin Buried Oxide): More than Moore technology for IoT and Automotive

2017 IEEE International Conference on IC Design and Technology (ICICDT), 2017, p.1-4

2017

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A 65 nm 1.0 V 1.84 ns Silicon-on-Thin-Box (SOTB) embedded SRAM with 13.72 nW/Mbit standby power for smart IoT

2017 Symposium on VLSI Technology, 2017, p.C220-C221

2017

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A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM

IEEE MICRO, 2015-11, Vol.35 (6), p.13-23

2015

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Development of Evaluation Method for Estimating Stress-Induced Change in Drain Current in Deep-sub-micron MOSFETs

Journal of Solid Mechanics and Materials Engineering, 2007, Vol.1(1), pp.93-101

2007

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Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTS

IEEE transactions on electron devices, 2011, Vol.58 (8), p.2249-2256

2011

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Development of Evaluation Method for Estimating Stress-Induced Change in Drain Current in Deep-sub-micron MOSFETs

Transactions of the Japan Society of Mechanical Engineers Series A, 2006/01/25, Vol.72(713), pp.47-54

2006

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Lateral profiling of trapped charge in SONOS flash EEPROMs programmed using CHE injection

IEEE transactions on electron devices, 2006-04, Vol.53 (4), p.698-705

2006

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Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array

Statistical Write Stability Characterization in SRAM Cells at Low Supply Voltage

Application of Piezoelectric PLLA Braided Cord as Wearable Sensor to Realize Monitoring System for Indoor Dogs with Less Physical or Mental Stress

Random Telegraph Signal in Flash Memory: Its Impact on Scaling of Multilevel Flash Memory Beyond the 90-nm Node

Comprehensive analysis of low-frequency noise variability components in bulk and fully depleted silicon-on-insulator metal-oxide-semiconductor field-effect transistor

Detailed analysis of minimum operation voltage of extraordinarily unstable cells in fully depleted silicon-on-buried-oxide six-transistor static random access memory

A 361nA thermal run-away immune VBB generator using dynamic substrate controlled charge pump for ultra low sleep current logic on 65nm SOTB

Thick-Strained-Si/Relaxed-SiGe Structure of High-Performance RF Power LDMOSFETs for Cellular Handsets

Impact of Oxide Thickness Fluctuation and Local Gate Depletion on Threshold Voltage Variation in Metal–Oxide–Semiconductor Field-Effect Transistors

High-Temperature Properties of Drain Current Variability in Scaled Field-Effect Transistors Analyzed by Decomposition Method

Ultralow-Power SOTB CMOS Technology Operating Down to 0.4 V

Impact of random telegraph noise on write stability in Silicon-on-Thin-BOX (SOTB) SRAM cells at low supply voltage in sub-0.4V regime

Consideration of Random Dopant Fluctuation Models for Accurate Prediction of Threshold Voltage Variation of Metal–Oxide–Semiconductor Field-Effect Transistors in 45 nm Technology and Beyond

Ultralow-voltage design and technology of silicon-on-thin-buried-oxide (SOTB) CMOS for highly energy efficient electronics in IoT era

Deep-Trap Stress Induced Leakage Current Model for Nominal and Weak Oxides

Statistical p–n Junction Leakage Model via Trap Level Fluctuation for Refresh-Time-Oriented Dynamic Random Access Memory Design

High-Temperature Properties of Drain Current Variability in Scaled Field-Effect Transistors Analyzed by Decomposition Method

New physical model to explain logarithmic time dependence of data retention in flash EEPROM

SOTB (Silicon on Thin Buried Oxide): More than Moore technology for IoT and Automotive

A 65 nm 1.0 V 1.84 ns Silicon-on-Thin-Box (SOTB) embedded SRAM with 13.72 nW/Mbit standby power for smart IoT

A Silicon-on-Thin-Buried-Oxide CMOS Microcontroller with Embedded Atom-Switch ROM

Development of Evaluation Method for Estimating Stress-Induced Change in Drain Current in Deep-sub-micron MOSFETs

Direct Measurement of Correlation Between SRAM Noise Margin and Individual Cell Transistor Variability by Using Device Matrix Array : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTS

Development of Evaluation Method for Estimating Stress-Induced Change in Drain Current in Deep-sub-micron MOSFETs

Lateral profiling of trapped charge in SONOS flash EEPROMs programmed using CHE injection

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