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A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures

IEEE transactions on computer-aided design of integrated circuits and systems, 2016-03, Vol.35 (3), p.471-484

2016

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Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency Scaling

IEEE transactions on computer-aided design of integrated circuits and systems, 2016-08, Vol.35 (8), p.1318-1331

2016

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Exploiting component dependency for accurate and efficient soft error analysis via Probabilistic Graphical Models

Microelectronics and reliability, 2015-01, Vol.55 (1), p.251-263

2015

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Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors

Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design, 2012, p.97-102

2012

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HyperPower: Power- and memory-constrained hyper-parameter optimization for neural networks

2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, p.19-24

2018

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COCO-GAN: Generation by Parts via Conditional Coordinating

2019 IEEE/CVF International Conference on Computer Vision (ICCV), 2019, p.4511-4520

2019

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DPP-Net: Device-Aware Progressive Search for Pareto-Optimal Neural Architectures

Computer Vision – ECCV 2018, p.540-555

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Remix: Rebalanced Mixup

Computer Vision – ECCV 2020 Workshops, p.95-110

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Improving Adversarial Robustness via Guided Complement Entropy

2019 IEEE/CVF International Conference on Computer Vision (ICCV), 2019, p.4880-4888

2019

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Statistical Peak Temperature Prediction and Thermal Yield Improvement for 3D Chip Multiprocessors

ACM transactions on design automation of electronic systems, 2014-08, Vol.19 (4), p.1-23

2014

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An Efficient Wake-Up Strategy Considering Spurious Glitches Phenomenon for Power Gating Designs

IEEE transactions on very large scale integration (VLSI) systems, 2010-02, Vol.18 (2), p.246-255

2010

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Adversarial Robustness Across Representation Spaces

2021 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2021, p.7604-7612

2021

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Impact of manufacturing process variations on performance and thermal characteristics of 3D ICs: Emerging challenges and new solutions

2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2013, p.541-544

2013

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Sleep Transistor Sizing for Leakage Power Minimization Considering Temporal Correlation

IEEE transactions on computer-aided design of integrated circuits and systems, 2010-08, Vol.29 (8), p.1285-1289

2010

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Beyond Poisson: Modeling Inter-Arrival Time of Requests in a Datacenter

Advances in Knowledge Discovery and Data Mining, p.198-209

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SVR-NoC: A performance analysis tool for Network-on-Chips using learning-based support vector regression model

2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, p.354-357

2013

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Searching toward pareto-optimal device-aware neural architectures

2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2018, p.1-7

2018

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DC-Prophet: Predicting Catastrophic Machine Failures in DataCenters

Machine Learning and Knowledge Discovery in Databases, p.64-76

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Hierarchical LSTM: Modeling Temporal Dynamics and Taxonomy in Location-Based Mobile Check-Ins

Advances in Knowledge Discovery and Data Mining, p.217-228

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A comprehensive and accurate latency model for Network-on-Chip performance analysis

2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC), 2014, p.323-328

2014

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Uncertainty Modeling of Emerging Device based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search

2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC), 2021, p.859-864

2021

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Sleep transistor sizing in power gating designs

2007 7th International Conference on ASIC, 2007, p.1326-1331

2007

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A learning-based autoregressive model for fast transient thermal analysis of chip-multiprocessors

17th Asia and South Pacific Design Automation Conference, 2012, p.597-602

2012

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Statistical thermal modeling and optimization considering leakage power variations

Proceedings of the Conference on Design, Automation and Test in Europe, 2012, p.605-610

2012

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M3A: Model, MetaModel and Anomaly Detection for Inter-arrivals of Web Searches and Postings

2017 IEEE International Conference on Data Science and Advanced Analytics (DSAA), 2017, p.341-350

2017

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A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures

Learning-Based Power/Performance Optimization for Many-Core Systems With Extended-Range Voltage/Frequency Scaling

Exploiting component dependency for accurate and efficient soft error analysis via Probabilistic Graphical Models

Power-aware performance increase via core/uncore reinforcement control for chip-multiprocessors

HyperPower: Power- and memory-constrained hyper-parameter optimization for neural networks

COCO-GAN: Generation by Parts via Conditional Coordinating

DPP-Net: Device-Aware Progressive Search for Pareto-Optimal Neural Architectures

Remix: Rebalanced Mixup

Improving Adversarial Robustness via Guided Complement Entropy

Statistical Peak Temperature Prediction and Thermal Yield Improvement for 3D Chip Multiprocessors

An Efficient Wake-Up Strategy Considering Spurious Glitches Phenomenon for Power Gating Designs

Adversarial Robustness Across Representation Spaces

Impact of manufacturing process variations on performance and thermal characteristics of 3D ICs: Emerging challenges and new solutions

Sleep Transistor Sizing for Leakage Power Minimization Considering Temporal Correlation

Beyond Poisson: Modeling Inter-Arrival Time of Requests in a Datacenter

SVR-NoC: A performance analysis tool for Network-on-Chips using learning-based support vector regression model

Searching toward pareto-optimal device-aware neural architectures

DC-Prophet: Predicting Catastrophic Machine Failures in DataCenters

Hierarchical LSTM: Modeling Temporal Dynamics and Taxonomy in Location-Based Mobile Check-Ins

A comprehensive and accurate latency model for Network-on-Chip performance analysis

Uncertainty Modeling of Emerging Device based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search

Sleep transistor sizing in power gating designs

A learning-based autoregressive model for fast transient thermal analysis of chip-multiprocessors

Statistical thermal modeling and optimization considering leakage power variations

M3A: Model, MetaModel and Anomaly Detection for Inter-arrivals of Web Searches and Postings

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