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40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist

IEEE transactions on circuits and systems. I, Regular papers, 2014-09, Vol.61 (9), p.2578-2585

2014

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IEEE_Xplore

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

IEEE journal of solid-state circuits, 2012-06, Vol.47 (6), p.1469-1482

2012

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IEEE_Xplore

All-Digital Synchronization for SC/OFDM Mode of IEEE 802.15.3c and IEEE 802.11ad

IEEE transactions on circuits and systems. I, Regular papers, 2015-02, Vol.62 (2), p.545-553

2015

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IEEE_Xplore

Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures

IEEE transactions on circuits and systems. I, Regular papers, 2014-10, Vol.61 (10), p.2869-2877

2014

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IEEE_Xplore

A 5.79-Gb/s Energy-Efficient Multirate LDPC Codec Chip for IEEE 802.15.3c Applications

IEEE journal of solid-state circuits, 2012-09, Vol.47 (9), p.2246-2257

2012

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IEEE_Xplore

High-Accuracy Fixed-Width Booth Multipliers Based on Probability and Simulation

IEEE transactions on circuits and systems. I, Regular papers, 2015-08, Vol.62 (8), p.2052-2061

2015

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IEEE_Xplore

Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist

IEEE transactions on circuits and systems. I, Regular papers, 2010-12, Vol.57 (12), p.3039-3047

2010

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IEEE_Xplore

A Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputs

IEEE transactions on very large scale integration (VLSI) systems, 2015-04, Vol.23 (4), p.766-770

2015

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IEEE_Xplore

An LDPC Decoder Chip Based on Self-Routing Network for IEEE 802.16e Applications

IEEE journal of solid-state circuits, 2008-03, Vol.43 (3), p.684-694

2008

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IEEE_Xplore

Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel

IEEE transactions on circuits and systems. I, Regular papers, 2017-03, Vol.64 (3), p.608-618

2017

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IEEE_Xplore

Low complexity formant estimation adaptive feedback cancellation for hearing aids using pitch based processing

IEEE/ACM transactions on audio, speech, and language processing, 2014-08, Vol.22 (8), p.1248-1259

2014

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IEEE_Xplore

Golay-Correlator Window-Based Noise Cancellation Equalization Technique for 60-GHz Wireless OFDM/SC Receiver

IEEE transactions on very large scale integration (VLSI) systems, 2016-11, Vol.24 (11), p.3323-3333

2016

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IEEE_Xplore

A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist

IEEE transactions on circuits and systems. I, Regular papers, 2014-12, Vol.61 (12), p.3416-3425

2014

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IEEE_Xplore

A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist

IEEE transactions on very large scale integration (VLSI) systems, 2015-05, Vol.23 (5), p.958-962

2015

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IEEE_Xplore

A Digital Golay-MPIC Time Domain Equalizer for SC/OFDM Dual-Modes at 60 GHz Band

IEEE transactions on circuits and systems. I, Regular papers, 2013-10, Vol.60 (10), p.2730-2739

2013

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IEEE_Xplore

An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver

IEEE transactions on circuits and systems. I, Regular papers, 2016-12, Vol.63 (12), p.2347-2356

2016

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IEEE_Xplore

A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression

IEEE transactions on circuits and systems. I, Regular papers, 2015-03, Vol.62 (3), p.743-751

2015

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IEEE_Xplore

A Low-Overhead Interference Canceller for High-Mobility STBC-OFDM Systems

IEEE transactions on circuits and systems. I, Regular papers, 2013-10, Vol.60 (10), p.2763-2773

2013

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IEEE_Xplore

A 14 μJ/Decision Keyword-Spotting Accelerator With In-SRAMComputing and On-Chip Learning for Customization

IEEE transactions on very large scale integration (VLSI) systems, 2022-09, Vol.30 (9), p.1184-1192

2022

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IEEE_Xplore

Low complexity synchronization design of an OFDM receiver for DVB-T/H

IEEE transactions on consumer electronics, 2009-05, Vol.55 (2), p.408-413

2009

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IEEE_Xplore

A jointed mode detection and symbol detection scheme for DVB-T

IEEE transactions on consumer electronics, 2008-05, Vol.54 (2), p.336-341

2008

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IEEE_Xplore

Analysis and implementation of low-power perceptual multiband noise reduction for the hearing aids application

IET circuits, devices & systems, 2014-11, Vol.8 (6), p.516-525

2014

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A systematic ANSI S1.11 filter bank specification relaxation and its efficient multirate architecture for hearing-aid systems

IEEE/ACM transactions on audio, speech, and language processing, 2016-08, Vol.24 (8), p.1380-1392

2016

Link zum Volltext
IEEE_Xplore

Neuromorphic Pitch Based Noise Reduction for Monosyllable Hearing Aid System Application

IEEE transactions on circuits and systems. I, Regular papers, 2014-02, Vol.61 (2), p.463-475

2014

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IEEE_Xplore

A MMSE Joint Feedback Feed-forward Equalizer for FBMC-OQAM Baseband Receiver in the 60 GHz Band

IEEE journal on emerging and selected topics in circuits and systems, 2017-12, Vol.7 (4), p.558-568

2017

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IEEE_Xplore

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40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist

A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing

All-Digital Synchronization for SC/OFDM Mode of IEEE 802.15.3c and IEEE 802.11ad

Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures

A 5.79-Gb/s Energy-Efficient Multirate LDPC Codec Chip for IEEE 802.15.3c Applications

High-Accuracy Fixed-Width Booth Multipliers Based on Probability and Simulation

Single-Ended Subthreshold SRAM With Asymmetrical Write/Read-Assist

A Low-Jitter Cell-Based Digitally Controlled Oscillator With Differential Multiphase Outputs

An LDPC Decoder Chip Based on Self-Routing Network for IEEE 802.16e Applications

Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel

Low complexity formant estimation adaptive feedback cancellation for hearing aids using pitch based processing

Golay-Correlator Window-Based Noise Cancellation Equalization Technique for 60-GHz Wireless OFDM/SC Receiver

A 40 nm 512 kb Cross-Point 8 T Pipeline SRAM With Binary Word-Line Boosting Control, Ripple Bit-Line and Adaptive Data-Aware Write-Assist

A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist

A Digital Golay-MPIC Time Domain Equalizer for SC/OFDM Dual-Modes at 60 GHz Band

An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver

A 10-Gb/s, 1.24 pJ/bit, Burst-Mode Clock and Data Recovery With Jitter Suppression

A Low-Overhead Interference Canceller for High-Mobility STBC-OFDM Systems

A 14 μJ/Decision Keyword-Spotting Accelerator With In-SRAMComputing and On-Chip Learning for Customization

Low complexity synchronization design of an OFDM receiver for DVB-T/H

A jointed mode detection and symbol detection scheme for DVB-T

Analysis and implementation of low-power perceptual multiband noise reduction for the hearing aids application

A systematic ANSI S1.11 filter bank specification relaxation and its efficient multirate architecture for hearing-aid systems

Neuromorphic Pitch Based Noise Reduction for Monosyllable Hearing Aid System Application

A MMSE Joint Feedback Feed-forward Equalizer for FBMC-OQAM Baseband Receiver in the 60 GHz Band

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