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A Chisel Generator for Standardized 3-D Die-to-Die Interconnects

IEEE journal on exploratory solid-state computational devices and circuits, 2024, Vol.10, p.58-66

2024

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High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology

Proceedings of the IEEE, 2015-07, Vol.103 (7), p.1181-1196

2015

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Modeling and Analysis of an 80-Gbit/s SiGe HBT Electrooptic Modulator

IEEE photonics journal, 2011-02, Vol.3 (1), p.42-56

2011

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A 16-Gb/s Backplane Transceiver With 12-Tap Current Integrating DFE and Dynamic Adaptation of Voltage Offset and Timing Drifts in 45-nm SOI CMOS Technology

IEEE journal of solid-state circuits, 2012-08, Vol.47 (8), p.1828-1841

2012

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A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits

IEEE transactions on very large scale integration (VLSI) systems, 2007-09, Vol.15 (9), p.1051-1054

2007

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A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technology

2011 IEEE Custom Integrated Circuits Conference (CICC), 2011, p.1-4

2011

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A 5–10 GHz SiGe BiCMOS FPGA with new configurable logic block

Microprocessors and microsystems, 2005-04, Vol.29 (2), p.121-131

2005

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A 10 GHz 4:1 MUX and 1:4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC

Integration (Amsterdam), 2005, Vol.38 (3), p.525-540

2005

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Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory

Field Programmable Logic and Application, 2003, Vol.2778, p.11-20

2003

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Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques

Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream, 2002, Vol.2438, p.414-423

2002

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A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology

Great Lakes Symposium on VLSI: Proceedings of the 13th ACM Great Lakes symposium on VLSI; 28-29 Apr. 2003, 2003, p.37-40

2003

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An 11 GHz FPGA with test applications

International Conference on Field Programmable Logic and Applications, 2005, 2005, p.101-105

2005

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Intra-Pair Skew Metric, EIPS (Effective Intra-Pair Skew)

2021 IEEE 25th Workshop on Signal and Power Integrity (SPI), 2021, p.1-4

2021

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The 10GHz 4:1 MUX and 1:4 DEMUX implemented via the gigahertz SiGe FPGA

Great Lakes Symposium on VLSI: Proceedings of the 14th ACM Great Lakes symposium on VLSI; 26-28 Apr. 2004, 2004, p.141-144

2004

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A High Speed Silicon Germanium Field Programmable Gate Array for Giga-Hertz Applications

Guo, Jong-Ru

2005

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A 5–10GHz SiGe BiCMOS FPGA with new configurable logic block

Microprocessors and microsystems, 2005-04, Vol.29 (2-3), p.121-131

2005

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A 10GHz 4:1 MUX and 1:4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC

Integration (Amsterdam), 2005-01, Vol.38 (3), p.525-540

2005

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A high speed reconfigurable gate array for gigahertz applications

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005, p.124-129

2005

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The gigahertz FPGA: design consideration and applications

International Symposium on Field Programmable Gate Arrays: Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays; 22-24 Feb. 2004, 2004, p.248-248