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A Novel Approach to Photonic Packaging Leveraging Existing High-Throughput Microelectronic Facilities

IEEE journal of selected topics in quantum electronics, 2016-11, Vol.22 (6), p.455-466

2016

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Three-Dimensional a-Si:H Solar Cells on Glass Nanocone Arrays Patterned by Self-Assembled Sn Nanospheres

ACS nano, 2012-01, Vol.6 (1), p.265-271

2012

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Electromigration induced ductile-to-brittle transition in lead-free solder joints

Applied physics letters, 2006-10, Vol.89 (14)

2006

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Fabrication and Performance of 300 mm Wafer Scale Silicon Microchannel Cooler

IEEE transactions on components, packaging, and manufacturing technology (2011), 2023-04, Vol.13 (4), p.1-1

2023

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Electromigration in flip chip solder joints having a thick Cu column bump and a shallow solder interconnect

Journal of applied physics, 2006-12, Vol.100 (12), p.123513-123513-5

2006

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An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

2015 Symposium on VLSI Technology (VLSI Technology), 2015, p.C192-C193

2015

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Automated, high-throughput photonic packaging

Optical fiber technology, 2018-08, Vol.44, p.24-35

2018

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Electromigration in flip chip solder bump of 97Pb–3Sn/37Pb–63Sn combination structure

Acta materialia, 2004-01, Vol.52 (1), p.129-136

2004

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Effect of electromigration on mechanical shear behavior of flip chip solder joints

Journal of materials research, 2006-03, Vol.21 (3), p.698-702

2006

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Formation of Pb/63Sn solder bumps using a solder droplet jetting method

IEEE transactions on electronics packaging manufacturing, 2005-07, Vol.28 (3), p.274-281

2005

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Application of electronic speckle-pattern interferometry to measure in-plane thermal displacement in flip-chip packages

Materials science & engineering. A, Structural materials : properties, microstructure and processing, 2004-08, Vol.380 (1), p.231-236

2004

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Flip chip assembly with sub-micron 3D re-alignment via solder surface tension

2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2015, p.35-40

2015

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Toward High-Yield 3D Self-Alignment of Flip-Chip Assemblies via Solder Surface Tension

2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2016, p.588-594

2016

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Solder Mobility for High-Yield Self-Aligned Flip-Chip Assembly

2017 IEEE 67th Electronic Components and Technology Conference (ECTC), 2017, p.667-674

2017

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Mechanism of electromigration-induced failure in flip-chip solder joints with a 10-μm-thick Cu under-bump metallization

Journal of materials research, 2007-03, Vol.22 (3), p.763-769

2007

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High-Speed Precision Handling Technology of Micro-Chip for Fan-Out Wafer Level Packaging (FOWLP) Application

2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 2018, p.1981-1986

2018

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Investigation of flip chip under bump metallization systems of Cu pads

IEEE transactions on components and packaging technologies, 2002-03, Vol.25 (1), p.32-37

2002

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Wafer IMS (Injection molded solder) - A new fine pitch solder bumping technology on wafers with solder alloy composition flexibility

2014 IEEE 64th Electronic Components and Technology Conference (ECTC), 2014, p.1308-1313

2014

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Integration and Packaging of Embedded Radial Micro-Channels for 3D Chip Cooling

2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2016, p.1271-1277

2016

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High-throughput photonic packaging

2017 Optical Fiber Communications Conference and Exhibition (OFC), 2017, p.1-3

2017

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Development of wafer level underfill materials and assembly processes for fine pitch Pb-free solder flip chip packaging

2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 2011, p.1015-1022

2011

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Enabling large-scale deployment of photonics through cost-efficient and scalable packaging

2015 IEEE 12th International Conference on Group IV Photonics (GFP), 2015, p.155-156

2015

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Flip chip assembly method employing differential heating/cooling for large dies with coreless substrates

2013 IEEE 63rd Electronic Components and Technology Conference, 2013, p.667-673

2013

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Photonic packaging in high-throughput microelectronic assembly lines for cost-efficiency and scalability

2015 Optical Fiber Communications Conference and Exhibition (OFC), 2015, p.1-3

2015

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An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

2015 Symposium on VLSI Circuits (VLSI Circuits), 2015, p.C192-C193

2015

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A Novel Approach to Photonic Packaging Leveraging Existing High-Throughput Microelectronic Facilities

Three-Dimensional a-Si:H Solar Cells on Glass Nanocone Arrays Patterned by Self-Assembled Sn Nanospheres

Electromigration induced ductile-to-brittle transition in lead-free solder joints

Fabrication and Performance of 300 mm Wafer Scale Silicon Microchannel Cooler

Electromigration in flip chip solder joints having a thick Cu column bump and a shallow solder interconnect

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

Automated, high-throughput photonic packaging

Electromigration in flip chip solder bump of 97Pb–3Sn/37Pb–63Sn combination structure

Effect of electromigration on mechanical shear behavior of flip chip solder joints

Formation of Pb/63Sn solder bumps using a solder droplet jetting method

Application of electronic speckle-pattern interferometry to measure in-plane thermal displacement in flip-chip packages

Flip chip assembly with sub-micron 3D re-alignment via solder surface tension

Toward High-Yield 3D Self-Alignment of Flip-Chip Assemblies via Solder Surface Tension

Solder Mobility for High-Yield Self-Aligned Flip-Chip Assembly

Mechanism of electromigration-induced failure in flip-chip solder joints with a 10-μm-thick Cu under-bump metallization

High-Speed Precision Handling Technology of Micro-Chip for Fan-Out Wafer Level Packaging (FOWLP) Application

Investigation of flip chip under bump metallization systems of Cu pads

Wafer IMS (Injection molded solder) - A new fine pitch solder bumping technology on wafers with solder alloy composition flexibility

Integration and Packaging of Embedded Radial Micro-Channels for 3D Chip Cooling

High-throughput photonic packaging

Development of wafer level underfill materials and assembly processes for fine pitch Pb-free solder flip chip packaging

Enabling large-scale deployment of photonics through cost-efficient and scalable packaging

Flip chip assembly method employing differential heating/cooling for large dies with coreless substrates

Photonic packaging in high-throughput microelectronic assembly lines for cost-efficiency and scalability

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors

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