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Work function and thermal stability of Ti1−xAlxNy for dual metal gate electrodes

Applied physics letters, 2002-11, Vol.81 (22), p.4192-4194

2002

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Influence of Hydrogen Incorporation on the Reliability of Gate Oxide Formed by Using Low-Temperature Plasma Selective Oxidation Applicable to Sub-50-nm W-Polymetal Gate Devices

IEEE electron device letters, 2008-04, Vol.29 (4), p.338-340

2008

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IEEE_Xplore

Effect of gate hard mask and sidewall spacer structures on the gate oxide reliability of W∕WNx∕poly-Si gate MOSFET for high density DRAM applications

Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 2005-05, Vol.23 (3), p.1036-1040

2005

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Effect of Selective Oxidation Conditions on Defect Generation in Gate Oxide

Japanese Journal of Applied Physics, 2004-04, Vol.43 (4S), p.1825

2004

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Gate-first high-k/metal gate DRAM technology for low power and high performance products

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.26.6.1-26.6.4

2015

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IEEE_Xplore

Junction leakage characteristics in modified LOCOS isolation structures with a nitride spacer

IEEE transactions on electron devices, 1999-01, Vol.46 (1), p.145-150

1999

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IEEE_Xplore

Reliability of Recess-channel Gate Cell Transistor under Gate-Induced Drain Leakage Stress and Positive Bias Fowler-Nordheim Gate Stress

2006 European Solid-State Device Research Conference, 2006, p.415-418

2006

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IEEE_Xplore

Impact of Thin WSIX Insertion in Tungsten Polymetal Gate on Gate Oxide Reliability and Gate Contact Resistance

2006 IEEE International Reliability Physics Symposium Proceedings, 2006, p.374-378

2006

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IEEE_Xplore

Study of Plasma Damage at Recess-Channel Gate (RG) Structure During Plasma Nitridation

2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual, 2007, p.370-373

2007

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IEEE_Xplore

Electrical Conduction in Aluminum Nitride

Journal of the American Ceramic Society, 1993-04, Vol.76 (4), p.957-960

1993

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Hot-carrier degradation mechanism in narrow- and wide-channel n-MOSFETs with recessed LOCOS isolation structure

IEEE electron device letters, 2000-03, Vol.21 (3), p.130-132

2000

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IEEE_Xplore

The role of polysilicon film in the suppression of bird's beak in poly-buffered LOCOS

IEEE transactions on electron devices, 1999-02, Vol.46 (2), p.433-436

1999

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IEEE_Xplore

Low resistive tungsten dual polymetal gate process for high speed and high density memory devices

ESSDERC 2007 - 37th European Solid State Device Research Conference, 2007, p.259-262

2007

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IEEE_Xplore

Investigation of stress behaviors and mechanism of void formation in sputtered TiSix films

Thin solid films, 2004-03, Vol.450 (2), p.341-345

2004

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Roles of Ti, TiN, and WN as an Interdiffusion Barrier for Tungsten Dual Polygate Stack in Memory Devices

Japanese Journal of Applied Physics, 2007-04, Vol.46 (4S), p.2134

2007

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Dependence of Gate Interfacial Resistance on the Formation of Insulative Boron–Nitride for p-Channel Metal–Oxide–Semiconductor Field-Effect Transistor in Tungsten Dual Polygate Memory Devices

Japanese Journal of Applied Physics, 2008-04, Vol.47 (4S), p.2704

2008

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Evaluation of double Spacer local oxidation of silicon (LOCOS) isolation process for sub-quarter micron design rule

Japanese Journal of Applied Physics, 1997-03, Vol.36 (3B), p.1433-1438

1997

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Effects of Dopants on the Complex Impedance and Dielectric Properties of Aluminum Nitride

Journal of the American Ceramic Society, 1992-11, Vol.75 (11), p.3145-3148

1992

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Impact of gate sidewall spacer structures on DRAM cell transistors under Fowler-Nordheim and gate-induced drain leakage stress conditions

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004, p.485-488

2004

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IEEE_Xplore

Highly Scalable Saddle-Fin (S-Fin) Transistor for Sub-50nm DRAM Technology

2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers, 2006, p.32-33

2006

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IEEE_Xplore

Retarded C54 transformation and suppressed agglomeration by precipitates in TiSi2 films

Journal of applied physics, 2000-03, Vol.87 (6), p.2760-2764

2000

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Effects of nitridation pressure on the characteristics of gate dielectrics annealed in N2O ambient

IEEE electron device letters, 1999-09, Vol.20 (9), p.445-447

1999

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IEEE_Xplore

Formation of Source/Drain extension by Antimony implantation for high performance DRAM peripheral transistors

2014 20th International Conference on Ion Implantation Technology (IIT), 2014, p.1-3

2014

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Robust ternary metal gate electrodes for dual gate CMOS devices

International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001, p.30.6.1-30.6.4

2001

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IEEE_Xplore

Investigation of stress behaviors and mechanism of void formation in sputtered TiSi x films

Thin solid films, 2004, Vol.450 (2), p.341-345

2004

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Work function and thermal stability of Ti1−xAlxNy for dual metal gate electrodes

Influence of Hydrogen Incorporation on the Reliability of Gate Oxide Formed by Using Low-Temperature Plasma Selective Oxidation Applicable to Sub-50-nm W-Polymetal Gate Devices

Effect of gate hard mask and sidewall spacer structures on the gate oxide reliability of W∕WNx∕poly-Si gate MOSFET for high density DRAM applications

Effect of Selective Oxidation Conditions on Defect Generation in Gate Oxide

Gate-first high-k/metal gate DRAM technology for low power and high performance products

Junction leakage characteristics in modified LOCOS isolation structures with a nitride spacer

Reliability of Recess-channel Gate Cell Transistor under Gate-Induced Drain Leakage Stress and Positive Bias Fowler-Nordheim Gate Stress

Impact of Thin WSIX Insertion in Tungsten Polymetal Gate on Gate Oxide Reliability and Gate Contact Resistance

Study of Plasma Damage at Recess-Channel Gate (RG) Structure During Plasma Nitridation

Electrical Conduction in Aluminum Nitride

Hot-carrier degradation mechanism in narrow- and wide-channel n-MOSFETs with recessed LOCOS isolation structure

The role of polysilicon film in the suppression of bird's beak in poly-buffered LOCOS

Low resistive tungsten dual polymetal gate process for high speed and high density memory devices

Investigation of stress behaviors and mechanism of void formation in sputtered TiSix films

Roles of Ti, TiN, and WN as an Interdiffusion Barrier for Tungsten Dual Polygate Stack in Memory Devices

Dependence of Gate Interfacial Resistance on the Formation of Insulative Boron–Nitride for p-Channel Metal–Oxide–Semiconductor Field-Effect Transistor in Tungsten Dual Polygate Memory Devices

Evaluation of double Spacer local oxidation of silicon (LOCOS) isolation process for sub-quarter micron design rule

Effects of Dopants on the Complex Impedance and Dielectric Properties of Aluminum Nitride

Impact of gate sidewall spacer structures on DRAM cell transistors under Fowler-Nordheim and gate-induced drain leakage stress conditions

Highly Scalable Saddle-Fin (S-Fin) Transistor for Sub-50nm DRAM Technology

Retarded C54 transformation and suppressed agglomeration by precipitates in TiSi2 films

Effects of nitridation pressure on the characteristics of gate dielectrics annealed in N2O ambient

Formation of Source/Drain extension by Antimony implantation for high performance DRAM peripheral transistors

Robust ternary metal gate electrodes for dual gate CMOS devices

Investigation of stress behaviors and mechanism of void formation in sputtered TiSi x films

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