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Operation voltage dependence of memory cell characteristics in fully depleted floating-body cell

IEEE transactions on electron devices, 2005-10, Vol.52 (10), p.2220-2226

2005

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Design of a 128-mb SOI DRAM using the floating body cell (FBC)

IEEE journal of solid-state circuits, 2006-01, Vol.41 (1), p.135-145

2006

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Analysis on high-frequency characteristics of SOI lateral BJTs with self-aligned external base for 2-GHz RF applications

IEEE transactions on electron devices, 2002-03, Vol.49 (3), p.414-421

2002

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A Floating-Body Cell Fully Compatible With 90-nm CMOS Technology Node for a 128-Mb SOI DRAM and Its Scalability

IEEE transactions on electron devices, 2007-03, Vol.54 (3), p.563-571

2007

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Midkine, a heparin-binding cytokine, plays key roles in intraperitoneal adhesions

Biochemical and biophysical research communications, 2004-04, Vol.317 (1), p.108-113

2004

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Highly scalable FBC (Floating Body Cell) with 25nm BOX structure for embedded DRAM applications

Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004, 2004, p.132-133

2004

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A novel lateral bipolar transistor with 67 GHz fmax on thin-film SOI for RF analog applications

IEEE transactions on electron devices, 2000-07, Vol.47 (7), p.1536

2000

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Oxygen isotope exchange between adsorbed NO and SrTiO3 surfaces

Applied surface science, 1999-04, Vol.144-45, p.88-91

1999

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Fully-depleted FBC (floating body cell) with enlarged signal window and excellent logic process compatibility

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.281-284

2004

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A novel lateral bipolar transistor with 67 GHz f)max) onthin-film SOI for RF analog applications

IEEE transactions on electron devices, 2000-07, Vol.47 (7), p.1536-1541

2000

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A novel lateral bipolar transistor with 67 GHz f/sub max/ on thin-film SOI for RF analog applications

IEEE transactions on electron devices, 2000-07, Vol.47 (7), p.1536-1541

2000

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An 18.5ns 128MB SOI DRAM with a floating body cell

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005, 2005, p.458-609 Vol. 1

2005

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A memory using one-transistor gain cell on SOI(FBC) with performance suitable for embedded DRAM's

2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408), 2003, p.93-96

2003

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A Floating Body Cell (FBC) fully Compatible with 90nm CMOS Technology Node for Embedded Applications

2006 IEEE International Conference on IC Design and Technology, 2006, p.1-6

2006

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An 0.3-μm Si epitaxial base BiCMOS technology with 37-GHz f/sub max/ and 10-V BV/sub ceo/ for RF telecommunication

IEEE transactions on electron devices, 1999-04, Vol.46 (4), p.712-721

1999

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An 0.3-mu m Si epitaxial base BiCMOS technology with 37-GHzf(max) and 10-V BV(ceo) for RF telecommunication

IEEE transactions on electron devices, 1999-04, Vol.46 (4), p.712-721

1999

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An 0.3-/spl mu/m Si epitaxial base BiCMOS technology with 37-GHz f/sub max/ and 10-V BV/sub ceo/ for RF telecommunication

IEEE transactions on electron devices, 1999-04, Vol.46 (4), p.712-721

1999

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0.3- mu m Si epitaxial base BiCMOS technology with 37-GHz f sub(max) and 10-V BV sub(ceo) for RF telecommunication

IEEE transactions on electron devices, 1999-01, Vol.46 (4), p.712-721

1999

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Ar implantation effects in SOI NMOSFET's under low voltage operation

2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207), 2001, p.89-90

2001

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Direct observation of gate oxide destruction due to BOX breakdown in SOI

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125), 2000, p.130-131

2000

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3-D simulation analysis of high performance SOI lateral BJT for RF applications

1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199), 1998, p.29-30

1998

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Floating Body RAM Technology and its Scalability to 32nm Node and Beyond

2006 International Electron Devices Meeting, 2006, p.1-4

2006

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Limitations of Double Polysilicon Self-Aligned Bipolar Transistor Structure

27th European Solid-State Device Research Conference, 1997, p.528-531

1997

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0.3 /spl mu/m BiCMOS technology for mixed analog/digital application systems

Proceedings of the 1997 Bipolar/BiCMOS Circuits and Technology Meeting, 1997, p.68-71

1997

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A floating body cell (FBC) fully compatible with 90nm CMOS technology(CMOS IV) for 128Mb SOI DRAM

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest, 2005, p.307-310

2005

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Operation voltage dependence of memory cell characteristics in fully depleted floating-body cell

Design of a 128-mb SOI DRAM using the floating body cell (FBC)

Analysis on high-frequency characteristics of SOI lateral BJTs with self-aligned external base for 2-GHz RF applications

A Floating-Body Cell Fully Compatible With 90-nm CMOS Technology Node for a 128-Mb SOI DRAM and Its Scalability

Midkine, a heparin-binding cytokine, plays key roles in intraperitoneal adhesions

Highly scalable FBC (Floating Body Cell) with 25nm BOX structure for embedded DRAM applications

A novel lateral bipolar transistor with 67 GHz fmax on thin-film SOI for RF analog applications

Oxygen isotope exchange between adsorbed NO and SrTiO3 surfaces

Fully-depleted FBC (floating body cell) with enlarged signal window and excellent logic process compatibility

A novel lateral bipolar transistor with 67 GHz f)max) onthin-film SOI for RF analog applications

A novel lateral bipolar transistor with 67 GHz f/sub max/ on thin-film SOI for RF analog applications

An 18.5ns 128MB SOI DRAM with a floating body cell

A memory using one-transistor gain cell on SOI(FBC) with performance suitable for embedded DRAM's

A Floating Body Cell (FBC) fully Compatible with 90nm CMOS Technology Node for Embedded Applications

An 0.3-μm Si epitaxial base BiCMOS technology with 37-GHz f/sub max/ and 10-V BV/sub ceo/ for RF telecommunication

An 0.3-mu m Si epitaxial base BiCMOS technology with 37-GHzf(max) and 10-V BV(ceo) for RF telecommunication

An 0.3-/spl mu/m Si epitaxial base BiCMOS technology with 37-GHz f/sub max/ and 10-V BV/sub ceo/ for RF telecommunication

0.3- mu m Si epitaxial base BiCMOS technology with 37-GHz f sub(max) and 10-V BV sub(ceo) for RF telecommunication

Ar implantation effects in SOI NMOSFET's under low voltage operation

Direct observation of gate oxide destruction due to BOX breakdown in SOI

3-D simulation analysis of high performance SOI lateral BJT for RF applications

Floating Body RAM Technology and its Scalability to 32nm Node and Beyond

Limitations of Double Polysilicon Self-Aligned Bipolar Transistor Structure

0.3 /spl mu/m BiCMOS technology for mixed analog/digital application systems

A floating body cell (FBC) fully compatible with 90nm CMOS technology(CMOS IV) for 128Mb SOI DRAM

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