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Failure characteristics of UHPFRC panels subjected to projectile impact

Composites. Part B, Engineering, 2020-02, Vol.182, p.107505, Article 107505

2020

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Method for evaluating the displacement response of RC beams subjected to close-in explosion using modified SDOF model

Engineering structures, 2018-02, Vol.157, p.105-118

2018

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Loop-parameter optimization of a PLL for a low-jitter 2.5-Gb/s one-chip optical receiver IC with 1: 8 DEMUX

IEEE journal of solid-state circuits, 2002-01, Vol.37 (1), p.38-50

2002

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PLL design technique by a loop-trajectory analysis taking decision-circuit phase margin into account for over-10-Gb/s clock and data recovery circuits

IEEE journal of solid-state circuits, 2004-05, Vol.39 (5), p.740-750

2004

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Fully transparent multiplexing and transport of 10GbE-LANPHY signals for 44.6Gbit/s-based RZ-DQPSK WDM transmission

Electronics letters, 2007-07, Vol.43 (14), p.769-771

2007

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Fully transparent multiplexing and transport of 10 GbE-LANPHY signals for 44.6 Gbit/s-based rz-dqpsk wdm transmission

Electronics letters, 2007, Vol.43 (14), p.769-771

2007

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250 mW 2.488 Gbit/s and 622 Mbit/s SONET/SDH bit-error monitoring LSI

Electronics letters, 1999-05, Vol.35 (11), p.914

1999

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A 0.6-W 10-Gb/s SONET/SDH bit-error-rate monitoring LSI

IEEE journal of solid-state circuits, 2000-12, Vol.35 (12), p.1988-1991

2000

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A jitter suppression technique for a 2.48832-Gb/s clock and data recovery circuit

IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 2002-04, Vol.49 (4), p.266-272

2002

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A 2.5-Gb/s clock and data recovery IC with tunable jitter characteristics for use in LANs and WANs

IEEE journal of solid-state circuits, 1999-06, Vol.34 (6), p.805-812

1999

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20 Gb/s digital SSIs using AlGaAs/GaAs heterojunction bipolar transistors for future optical transmission systems

IEEE journal of solid-state circuits, 1993-02, Vol.28 (2), p.115-122

Ichino, H.

1993

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A high-speed, low-power bipolar digital circuit for Gb/s LSI's: current mirror control logic

IEEE journal of solid-state circuits, 1997-02, Vol.32 (2), p.215-221

1997

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A 0.6W 10Gb/s SONET/SDH bit-error-monitoring LSI

Digest of technical papers - IEEE International Solid-State Circuits Conference, 2000

2000

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An ultracompact, 2-cc-size, low-power 2.5-Gb/s optical receiver module incorporating an MU receptacle

Journal of lightwave technology, 1999-11, Vol.17 (11), p.2349-2355

1999

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2.5 Gbit/s clock and data recovery circuit IC using novel duplicated PLL technique

Electronics letters, 1999-03, Vol.35 (5), p.360-361

1999

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A 557-mW, 2.5-Gbit/s SONET/SDH regenerator-section terminating LSI chip using low-power bipolar-LSI design

IEEE journal of solid-state circuits, 1999-01, Vol.34 (1), p.12-17

1999

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Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops

IEEE journal of solid-state circuits, 1995-01, Vol.30 (1), p.19-24

1995

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High-speed, low-power, bipolar standard cell design methodology for Gbit/s signal processing

IEEE journal of solid-state circuits, 1998-10, Vol.33 (10), p.1536-1544

1998

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Maximum operating frequency in Si bipolar master-slave toggle flip-flop circuit

IEEE journal of solid-state circuits, 1994-07, Vol.29 (7), p.754-760

1994

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High speed regenerator-section terminating LSI operating up to 2.5 Gbit/s using 0.5μm Si bipolar standard-cell technology

Electronics letters, 1995-05, Vol.31 (10), p.791-792

1995

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Over-10-Gb/s IC's for future lightwave communications

Journal of lightwave technology, 1994-02, Vol.12 (2), p.308-319

1994

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Over 20 Gbit/s throughput ATM crosspoint switch large scale integrated circuit using Si bipolar technology

Electronics letters, 1994-05, Vol.30 (11), p.854-855

1994

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18-GHz 1/8 dynamic frequency divider using Si bipolar technologies

IEEE journal of solid-state circuits, 1989-12, Vol.24 (6), p.1723-1728

1989

Volltextzugriff (PDF)

High-bit-rate, high-input-sensitivity decision circuit using Si bipolar technology

IEEE journal of solid-state circuits, 1994-05, Vol.29 (5), p.546-550

1994

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Fully transparent multiplexing and transport of 10 GbE-LANPHY signals for 44.6 Gbit/s-based RZ-DQPSK WDM transmission

Electronics letters, 2007-07, Vol.43 (14), p.1-1

2007

Volltextzugriff (PDF)

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Failure characteristics of UHPFRC panels subjected to projectile impact

Method for evaluating the displacement response of RC beams subjected to close-in explosion using modified SDOF model

Loop-parameter optimization of a PLL for a low-jitter 2.5-Gb/s one-chip optical receiver IC with 1: 8 DEMUX

PLL design technique by a loop-trajectory analysis taking decision-circuit phase margin into account for over-10-Gb/s clock and data recovery circuits

Fully transparent multiplexing and transport of 10GbE-LANPHY signals for 44.6Gbit/s-based RZ-DQPSK WDM transmission

Fully transparent multiplexing and transport of 10 GbE-LANPHY signals for 44.6 Gbit/s-based rz-dqpsk wdm transmission

250 mW 2.488 Gbit/s and 622 Mbit/s SONET/SDH bit-error monitoring LSI

A 0.6-W 10-Gb/s SONET/SDH bit-error-rate monitoring LSI

A jitter suppression technique for a 2.48832-Gb/s clock and data recovery circuit

A 2.5-Gb/s clock and data recovery IC with tunable jitter characteristics for use in LANs and WANs

20 Gb/s digital SSIs using AlGaAs/GaAs heterojunction bipolar transistors for future optical transmission systems

A high-speed, low-power bipolar digital circuit for Gb/s LSI's: current mirror control logic

A 0.6W 10Gb/s SONET/SDH bit-error-monitoring LSI

An ultracompact, 2-cc-size, low-power 2.5-Gb/s optical receiver module incorporating an MU receptacle

2.5 Gbit/s clock and data recovery circuit IC using novel duplicated PLL technique

A 557-mW, 2.5-Gbit/s SONET/SDH regenerator-section terminating LSI chip using low-power bipolar-LSI design

Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops

High-speed, low-power, bipolar standard cell design methodology for Gbit/s signal processing

Maximum operating frequency in Si bipolar master-slave toggle flip-flop circuit

High speed regenerator-section terminating LSI operating up to 2.5 Gbit/s using 0.5μm Si bipolar standard-cell technology

Over-10-Gb/s IC's for future lightwave communications

Over 20 Gbit/s throughput ATM crosspoint switch large scale integrated circuit using Si bipolar technology

18-GHz 1/8 dynamic frequency divider using Si bipolar technologies

High-bit-rate, high-input-sensitivity decision circuit using Si bipolar technology

Fully transparent multiplexing and transport of 10 GbE-LANPHY signals for 44.6 Gbit/s-based RZ-DQPSK WDM transmission

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