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A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression

IEEE journal of solid-state circuits, 2013-04, Vol.48 (4), p.897-906

2013

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A 0.25 μm complementary metal oxide semiconductor field effect transistor (CMOSFET) using halo implantation for 1 Gbit dynamic random access memory (DRAM)

Japanese journal of applied physics, 1996-02, Vol.35 (2B), p.865-868

1996

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A 0.25V 460nW asynchronous neural signal processor with inherent leakage suppression

2012 Symposium on VLSI Circuits (VLSIC), 2012, p.158-159

2012

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A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist

IEEE transactions on very large scale integration (VLSI) systems, 2015-05, Vol.23 (5), p.958-962

2015

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A 0.33-V, 500-kHz, 3.94-[Formula Omitted] 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist

IEEE transactions on circuits and systems. II, Express briefs, 2012-12, Vol.59 (12), p.863-867

2012

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A 0.33-V, 500-kHz, 3.94- \mu\hbox 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist

IEEE transactions on circuits and systems. II, Express briefs, 2012-12, Vol.59 (12), p.863-867

2012

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0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.129-132

2014

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A 0.35 V, 375 kHz, 5.43 mu W, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line

Microelectronics, 2016-05, Vol.51, p.89-98

2016

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A 0.35 V, 375 kHz, 5.43 µW, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line

Microelectronics, 2016-05, Vol.51, p.89-98

2016

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A 0.35V, 375kHz, 5.43µW, 40nm, 128kb, symmetrical 10T subthreshold SRAM with tri-state bit-line

Microelectronics, 2016-05, Vol.51, p.89-98

2016

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0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

2018 31st IEEE International System-on-Chip Conference (SOCC), 2018, p.272-277

2018

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A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist

IEEE transactions on circuits and systems. I, Regular papers, 2017-07, Vol.64 (7), p.1791-1802

2017

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A 0.64 mm 2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

IEEE transactions on very large scale integration (VLSI) systems, 2011-11, Vol.19 (11), p.1937-1948

2011

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A 0.64 mm ^ Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

IEEE transactions on very large scale integration (VLSI) systems, 2011-11, Vol.19 (11), p.1937-1948

2011

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A 0.64 mm2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

IEEE transactions on very large scale integration (VLSI) systems, 2011, Vol.19 (11), p.1937-1948

2011

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A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator

Proceedings of the 30th European Solid-State Circuits Conference, 2004, p.375-378

2004

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A 0.8V, 152 μW, 433 MHz Mixer-First Receiver with a Self-Adjusted Frequency Tracking Loop

IEEE access, 2021, Vol.9, p.94203-94213

2021

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A 0.8V, 43.5μW ECG signal acquisition IC with a referenceless time-to-digital converter

2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, p.1066-1069

2016

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A 0.9mW 0.01-1.4GHz Wideband CMOS Low Noise Amplifier for Low-Band Ultra Wideband Applications

2005 IEEE Asian Solid-State Circuits Conference, 2005, p.345-348

2005

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0001 ANALYSIS OF THE ENTIRE HLA REGION IN SUSCEPTIBILITY FOR CERVICAL CANCER: A COMPREHENSIVE STUDY

International journal of gynecological cancer, 2005-09, Vol.15 (Suppl 2), p.51-51

2005

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001 Cellules souches mésenchymateuses et cicatrisation cornéenne

Journal français d'ophtalmologie, 2009-04, Vol.32, p.1S18-1S18

2009

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001 Le D.S.A. sur les pistes de ski

Journal européen des urgences, 2004-03, Vol.17, p.7-7

2004

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0015 The significance and application of salivary biomarkers of stress, cortisol awakening response, in occupational psychology

Occupational and environmental medicine (London, England), 2017-08, Vol.74 (Suppl 1), p.A3

2017

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0016 Association between pm 2.5 exposure and lipid peroxidation was confirm by repeated measurements longitudinal study with a proper interaction term

Occupational and environmental medicine (London, England), 2017-08, Vol.74 (Suppl 1), p.A3

2017

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002 Les traumatismes du globe oculaire à la lumière de la classification terminologique et pronostique de Birmingham : série de 567 cas

Journal français d'ophtalmologie, 2008-04, Vol.31, p.18-18

2008

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A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression

A 0.25 μm complementary metal oxide semiconductor field effect transistor (CMOSFET) using halo implantation for 1 Gbit dynamic random access memory (DRAM)

A 0.25V 460nW asynchronous neural signal processor with inherent leakage suppression

A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist

A 0.33-V, 500-kHz, 3.94-[Formula Omitted] 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist

A 0.33-V, 500-kHz, 3.94- \mu\hbox 40-nm 72-Kb 9T Subthreshold SRAM With Ripple Bit-Line Structure and Negative Bit-Line Write-Assist

0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

A 0.35 V, 375 kHz, 5.43 mu W, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line

A 0.35 V, 375 kHz, 5.43 µW, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line

A 0.35V, 375kHz, 5.43µW, 40nm, 128kb, symmetrical 10T subthreshold SRAM with tri-state bit-line

0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist

A 0.64 mm 2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

A 0.64 mm ^ Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

A 0.64 mm2 Real-Time Cascade Face Detection Design Based on Reduced Two-Field Extraction

A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator

A 0.8V, 152 μW, 433 MHz Mixer-First Receiver with a Self-Adjusted Frequency Tracking Loop

A 0.8V, 43.5μW ECG signal acquisition IC with a referenceless time-to-digital converter

A 0.9mW 0.01-1.4GHz Wideband CMOS Low Noise Amplifier for Low-Band Ultra Wideband Applications

0001 ANALYSIS OF THE ENTIRE HLA REGION IN SUSCEPTIBILITY FOR CERVICAL CANCER: A COMPREHENSIVE STUDY

001 Cellules souches mésenchymateuses et cicatrisation cornéenne

001 Le D.S.A. sur les pistes de ski

0015 The significance and application of salivary biomarkers of stress, cortisol awakening response, in occupational psychology

0016 Association between pm 2.5 exposure and lipid peroxidation was confirm by repeated measurements longitudinal study with a proper interaction term

002 Les traumatismes du globe oculaire à la lumière de la classification terminologique et pronostique de Birmingham : série de 567 cas

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