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0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2014, p.129-132

2014

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0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

2018 31st IEEE International System-on-Chip Conference (SOCC), 2018, p.272-277

2018

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A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist

IEEE transactions on circuits and systems. I, Regular papers, 2017-07, Vol.64 (7), p.1791-1802

2017

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10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface

2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016, p.184-185

2016

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A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection

IEEE journal of solid-state circuits, 2017-04, Vol.52 (4), p.1111-1122

2017

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A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS

2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 2016, p.1-2

2016

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18.6 2.5D heterogeneously integrated bio-sensing microsystem for multi-channel neural-sensing applications

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014, p.320-321

2014

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2.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing Applications

IEEE transactions on biomedical circuits and systems, 2014-12, Vol.8 (6), p.810-823

2014

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2-level FIFO architecture design for switch fabrics in network-on-chip

2006 IEEE International Symposium on Circuits and Systems (ISCAS), 2006, p.4 pp.-4866

2006

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A 256×128 Energy-Efficient TCAM with Novel Low Power Schemes

2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2007, p.1-4

2007

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28nm 0.3V 1W2R Sub-Threshold FIFO Memory for Multi-Sensor IoT Applications

2019 32nd IEEE International System-on-Chip Conference (SOCC), 2019, p.248-253

2019

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A 28nm 343.5fps/W Vision Transformer Accelerator with Integer-Only Quantized Attention Block

2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS), 2024, p.80-84

2024

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A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning

2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024, p.1-5

2024

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28nm near/sub-threshold dual-port FIFO memory for shared queues in multi-sensor applications

2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2018, p.1-4

2018

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28nm ultra-low power near-/sub-threshold first-in-first-out (FIFO) memory for multi-bio-signal sensing platforms

2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2016, p.1-4

2016

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A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012, p.1-4

2012

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3D On-Demand Flying Mobile Communication for Millimeter-Wave Heterogeneous Networks

IEEE network, 2020-09, Vol.34 (5), p.198-204

2020

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3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size ( \mathbf\times \mathbf\mathbf^}) Single-Crystalline Si on SiO2 by Elevated-Epi

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop

2008 IEEE International Symposium on Circuits and Systems, 2008, p.3342-3345

2008

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A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface

2015 IEEE Custom Integrated Circuits Conference (CICC), 2015, p.1-4

2015

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A 64-channel wireless neural sensing microsystem with TSV-embedded micro-probe array for neural signal acquisition

2017 19th International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS), 2017, p.28-31

2017

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A 65 nm 0.165 fJ/Bit/Search 256 × 144 TCAM Macro Design for IPv6 Lookup Tables

IEEE journal of solid-state circuits, 2011-02, Vol.46 (2), p.507-519

2011

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A 65 nm 0.165 fJ/Bit/Search 256 \,\times\,144 TCAM Macro Design for IPv6 Lookup Tables

IEEE journal of solid-state circuits, 2011-02, Vol.46 (2), p.507-519

2011

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A 65nm low power 2T1D embedded DRAM with leakage current reduction

2007 IEEE International SOC Conference, 2007, p.207-210

2007

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A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET

Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019, p.1-8

2019

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0.339fJ/bit/search energy-efficient TCAM macro design in 40nm LP CMOS

0.4V Reconfigurable Near-Threshold TCAM in 28nm High-k Metal-Gate CMOS Process

A 0.5-V 28-nm 256-kb Mini-Array Based 6T SRAM With Vtrip-Tracking Write-Assist

10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface

A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection

A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS

18.6 2.5D heterogeneously integrated bio-sensing microsystem for multi-channel neural-sensing applications

2.5D Heterogeneously Integrated Microsystem for High-Density Neural Sensing Applications

2-level FIFO architecture design for switch fabrics in network-on-chip

A 256×128 Energy-Efficient TCAM with Novel Low Power Schemes

28nm 0.3V 1W2R Sub-Threshold FIFO Memory for Multi-Sensor IoT Applications

A 28nm 343.5fps/W Vision Transformer Accelerator with Integer-Only Quantized Attention Block

A 28nm Energy-Area-Efficient Row-based pipelined Training Accelerator with Mixed FXP4/FP16 for On-Device Transfer Learning

28nm near/sub-threshold dual-port FIFO memory for shared queues in multi-sensor applications

28nm ultra-low power near-/sub-threshold first-in-first-out (FIFO) memory for multi-bio-signal sensing platforms

A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs

3D On-Demand Flying Mobile Communication for Millimeter-Wave Heterogeneous Networks

3DIC with Stacked FinFET, Inter-Level Metal, and Field-Size ( \mathbf\times \mathbf\mathbf^}) Single-Crystalline Si on SiO2 by Elevated-Epi

A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop

A 5.4-mW 4-Gb/s 5-band QPSK transceiver for frequency-division multiplexing memory interface

A 64-channel wireless neural sensing microsystem with TSV-embedded micro-probe array for neural signal acquisition

A 65 nm 0.165 fJ/Bit/Search 256 × 144 TCAM Macro Design for IPv6 Lookup Tables

A 65 nm 0.165 fJ/Bit/Search 256 \,\times\,144 TCAM Macro Design for IPv6 Lookup Tables

A 65nm low power 2T1D embedded DRAM with leakage current reduction

A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET

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