UB Paderborn / Katalog / Suche / in CDI

Verificarlo: Checking Floating Point Accuracy through Monte Carlo Arithmetic

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.55-62

2016

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Multioperand Redundant Adders on FPGAs

IEEE transactions on computers, 2013-10, Vol.62 (10), p.2013-2025

2013

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High resolution spectral analysis of images using the pseudo-Wigner distribution

IEEE transactions on signal processing, 1998-06, Vol.46 (6), p.1757-1763

1998

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SAD computation based on online arithmetic for motion estimation

Microprocessors and microsystems, 2006-08, Vol.30 (5), p.250-258

2006

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Quad Precision Floating Point on the IBM z13

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.87-94

2016

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Radix-2 Multioperand and Multiformat Streaming Online Addition

IEEE transactions on computers, 2012-06, Vol.61 (6), p.790-803

2012

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An Iterative Logarithmic Multiplier with Improved Precision

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.104-111

2016

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Computing floating-point logarithms with fixed-point operations

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.156-163

2016

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Multi-fault Attack Detection for RNS Cryptographic Architecture

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.16-23

2016

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A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.150-155

2016

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Hybrid Position-Residues Number System

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.126-133

2016

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Optimizing Modular Multiplication for NVIDIA's Maxwell GPUs

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.47-54

2016

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Accelerating Big Integer Arithmetic Using Intel IFMA Extensions

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.32-38

2016

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A Formulation of Fast Carry Chains Suitable for Efficient Implementation with Majority Elements

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.8-15

2016

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Efficient Combinational Circuits for Division by Small Integer Constants

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.1-7

2016

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Evaluating Straight-Line Programs over Balls

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.142-149

2016

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Random Digit Representation of Integers

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.118-125

2016

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A New Multiplication Algorithm for Extended Precision Using Floating-Point Expansions

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.39-46

2016

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Single Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.164-171

2016

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On-line Multiplication and Division in Real and Complex Bases

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.134-141

2016

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Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.95-103

2016

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Recovering Numerical Reproducibility in Hydrodynamic Simulations

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.63-70

2016

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Correctly Rounded Arbitrary-Precision Floating-Point Summation

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.71-78

Lefevre, Vincent

2016

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Digit Recurrence Floating-Point Division under HUB Format

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.79-86

Villalba-Moreno, Julio

2016

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Automated Design of Floating-Point Logarithm Functions on Integer Processors

2016 IEEE 23nd Symposium on Computer Arithmetic (ARITH), 2016, p.172-180

Revy, Guillaume

2016

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Verificarlo: Checking Floating Point Accuracy through Monte Carlo Arithmetic

Multioperand Redundant Adders on FPGAs

High resolution spectral analysis of images using the pseudo-Wigner distribution

SAD computation based on online arithmetic for motion estimation

Quad Precision Floating Point on the IBM z13

Radix-2 Multioperand and Multiformat Streaming Online Addition

An Iterative Logarithmic Multiplier with Improved Precision

Computing floating-point logarithms with fixed-point operations

Multi-fault Attack Detection for RNS Cryptographic Architecture

A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes

Hybrid Position-Residues Number System

Optimizing Modular Multiplication for NVIDIA's Maxwell GPUs

Accelerating Big Integer Arithmetic Using Intel IFMA Extensions

A Formulation of Fast Carry Chains Suitable for Efficient Implementation with Majority Elements

Efficient Combinational Circuits for Division by Small Integer Constants

Evaluating Straight-Line Programs over Balls

Random Digit Representation of Integers

A New Multiplication Algorithm for Extended Precision Using Floating-Point Expansions

Single Precision Natural Logarithm Architecture for Hard Floating-Point and DSP-Enabled FPGAs

On-line Multiplication and Division in Real and Complex Bases

Accuracy and Performance Trade-Offs of Logarithmic Number Units in Multi-Core Clusters

Recovering Numerical Reproducibility in Hydrodynamic Simulations

Correctly Rounded Arbitrary-Precision Floating-Point Summation

Digit Recurrence Floating-Point Division under HUB Format

Automated Design of Floating-Point Logarithm Functions on Integer Processors

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