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Pipelined Statistical Cipher Feedback: A New Mode for High-Speed Self-Synchronizing Stream Encryption

IEEE transactions on computers, 2011-11, Vol.60 (11), p.1581-1595

2011

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Using deep learning to combine static and dynamic power analyses of cryptographic circuits

International journal of circuit theory and applications, 2019-06, Vol.47 (6), p.971-990

2019

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Statistical Cipher Feedback of Stream Ciphers

Computer journal, 2017-12, Vol.60 (12), p.1839-1851

Heys, Howard M

2017

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Variation-Aware Analog Circuit Sizing in Carbon Nanotube

2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, p.2891-2894

2022

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Kernel-based template attacks of cryptographic circuits using static power

Integration (Amsterdam), 2019-05, Vol.66, p.67-79

2019

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Error burst analysis of a statistical self‐synchronizing mode of block ciphers

Security and communication networks, 2016-11, Vol.9 (16), p.3340-3352

Heys, Howard M.

2016

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Simple power analysis applied to nonlinear feedback shift registers

IET information security, 2014-05, Vol.8 (3), p.188-198

2014

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Application of Simple Power Analysis to Stream Ciphers Constructed Using Feedback Shift Registers

Computer journal, 2015-04, Vol.58 (4), p.961-972

2015

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Performance Characterization of AES Datapath Architectures in 90-nm Standard Cell CMOS Technology

Journal of signal processing systems, 2014-06, Vol.75 (3), p.217-231

2014

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An analytical approach to the performance evaluation of the balanced gamma switch under multicast traffic

International journal of communication systems, 2007-04, Vol.20 (4), p.427-460

2007

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PERFORMANCE CHARACTERIZATION OF PIPELINED S-BOX IMPLEMENTATIONS FOR THE ADVANCED ENCRYPTION STANDARD

Journal of circuits, systems, and computers, 2014-03, Vol.23 (3), p.1450036

2014

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Robust CNFET Circuit Sizing Optimization

2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2022, p.1-4

2022

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Multi-Objective Variation-Aware Sizing for Analog CNFET Circuits

2022 23rd International Symposium on Quality Electronic Design (ISQED), 2022, p.1-6

2022

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A TUTORIAL ON LINEAR AND DIFFERENTIAL CRYPTANALYSIS

Cryptologia, 2002-07, Vol.26 (3), p.189-221

Heys, Howard M.

2002

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Error burst analysis of a statistical self-synchronizing mode of block ciphers: Submission to security and communication networks

Security and communication networks, 2016-11, Vol.9 (16), p.3340-3352

Heys, Howard M.

2016

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A simple power analysis attack against the key schedule of the Camellia block cipher

Information processing letters, 2005-08, Vol.95 (3), p.409-412

2005

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Design and implementation of a scalable switch architecture for efficient high-speed data multicasting

International journal of communication systems, 2007-09, Vol.20 (9), p.1011-1036

2007

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Template attacks based on static power analysis of block ciphers in 45-nm CMOS environment

2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017, p.1256-1259

2017

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Energy efficiency of encryption schemes applied to wireless sensor networks

Security and communication networks, 2012-07, Vol.5 (7), p.789-808

2012

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Novel Visual Cryptography Schemes Without Pixel Expansion for Halftone Images

Canadian journal of electrical and computer engineering, 2014, Vol.37 (3), p.168-177

2014

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Substitution-permutation networks resistant to differential and linear cryptanalysis

Journal of cryptology, 1996-03, Vol.9 (1), p.1-19

1996

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Energy efficiency of symmetric key cryptographic algorithms in wireless sensor networks

2010 25th Biennial Symposium on Communications, 2010, p.168-172

2010

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Novel Visual Cryptography Schemes Without Pixel Expansion for Halftone Images/Nouveaux systèmes de cryptographie visuelle sans expansion de pixel pour images en demi-teinte

Canadian journal of electrical and computer engineering, 2014-07, Vol.37 (3), p.168

2014

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Analytic modeling of interconnect capacitance in submicron and nanometer technologies

2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2013, p.2553-2556

2013

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Selected Areas in Cryptography: 5th Annual International Workshop, SAC'98, Kingston, Ontario, Canada, August 17-18, 1998, Proceedings

1, 1999

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Pipelined Statistical Cipher Feedback: A New Mode for High-Speed Self-Synchronizing Stream Encryption

Using deep learning to combine static and dynamic power analyses of cryptographic circuits

Statistical Cipher Feedback of Stream Ciphers

Variation-Aware Analog Circuit Sizing in Carbon Nanotube

Kernel-based template attacks of cryptographic circuits using static power

Error burst analysis of a statistical self‐synchronizing mode of block ciphers

Simple power analysis applied to nonlinear feedback shift registers

Application of Simple Power Analysis to Stream Ciphers Constructed Using Feedback Shift Registers

Performance Characterization of AES Datapath Architectures in 90-nm Standard Cell CMOS Technology

An analytical approach to the performance evaluation of the balanced gamma switch under multicast traffic

PERFORMANCE CHARACTERIZATION OF PIPELINED S-BOX IMPLEMENTATIONS FOR THE ADVANCED ENCRYPTION STANDARD

Robust CNFET Circuit Sizing Optimization

Multi-Objective Variation-Aware Sizing for Analog CNFET Circuits

A TUTORIAL ON LINEAR AND DIFFERENTIAL CRYPTANALYSIS

Error burst analysis of a statistical self-synchronizing mode of block ciphers: Submission to security and communication networks

A simple power analysis attack against the key schedule of the Camellia block cipher

Design and implementation of a scalable switch architecture for efficient high-speed data multicasting

Template attacks based on static power analysis of block ciphers in 45-nm CMOS environment

Energy efficiency of encryption schemes applied to wireless sensor networks

Novel Visual Cryptography Schemes Without Pixel Expansion for Halftone Images

Substitution-permutation networks resistant to differential and linear cryptanalysis

Energy efficiency of symmetric key cryptographic algorithms in wireless sensor networks

Novel Visual Cryptography Schemes Without Pixel Expansion for Halftone Images/Nouveaux systèmes de cryptographie visuelle sans expansion de pixel pour images en demi-teinte

Analytic modeling of interconnect capacitance in submicron and nanometer technologies

Selected Areas in Cryptography: 5th Annual International Workshop, SAC'98, Kingston, Ontario, Canada, August 17-18, 1998, Proceedings

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