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Advanced 2D/3D ESD device simulation – a powerful tool already used in a pre-Si phase

Microelectronics and reliability, 2001-11, Vol.41 (11), p.1761-1770

2001

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Risetime effects of HBM and square pulses on the failure thresholds of GGNMOS-transistors

Microelectronics and reliability, 1996-11, Vol.36 (11-12), p.1743-1746

1996

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Does the ESD-failure current obtained by transmission-line pulsing always correlate to human body model tests?

Microelectronics and reliability, 1998-11, Vol.38 (11), p.1773-1780

1998

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Reproducibility of field failures by ESD models — Comparison of HBM, socketed CDM and non-socketed CDM

Microelectronics and reliability, 1996-11, Vol.36 (11-12), p.1719-1722

1996

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Test structures and testing methods for electrostatic discharge: results of PROPHECY project

Microelectronics and reliability, 1999, Vol.39 (5), p.635-646

1999

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A new ESD protection concept for VLSI CMOS circuits avoiding circuit stress

Journal of electrostatics, 1992-12, Vol.29 (1), p.21-39

1992

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Does The Esd-failure Current Obtained By Transmissionline Pulsing Always Correlate To Human Body Model Tests?

Proceedings Electrical Overstress/Electrostatic Discharge Symposium, 1997, p.366-372

1997

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Test structures and testing methods for electrostatic discharge : results of PROPHECY project : Special Section : EU Research Project Prophecy Papers

Microelectronics and reliability, 1999, Vol.39 (5), p.635-646

1999

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ESD Monitor circuit-a tool to investigate the susceptibility and failure mechanisms of the charged device model

Quality and reliability engineering international, 1996-07, Vol.12 (4), p.265-270

1996

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MOS-Degradation in Input and Output Stages of VLSI-CMOS-Circuits Due to Electrostatic Discharge

ESSDERC '88: 18th European Solid State Device Research Conference, 1988-09, Vol.49 (C4), p.c4-303-c4-306

Guggenmos, X.

1988

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Analysis of HBM ESD testers and specifications using a fourth-order lumped element model

Quality and reliability engineering international, 1994, Vol.10 (4), p.325-334

1994

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Design Constraints for NMOS VLSIs Due to Substrate Current

ESSCIRC '82: Eighth European Solid-State Circuits Conference, 1982, p.178-181

1982

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Advanced 2D/3D ESD device simulation-a powerful tool already used in a pre-Si phase

Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476), 2000, p.420-429

2000

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Reproducibility of field failures by ESD models - comparison of HBM, socketed CDM and non-socketed CDM

Proceedings of the 7th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 1996, p.1719-1722

1996

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Risetime effects of HBM and square pulses on the failure thresholds of GGNMOS transistors

Proceedings of the 7th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 1996, p.1743-1746

1996

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Electron dynamics in transition metal dichalcogenides utilizing attosecond transient absorption spectroscopy

2018 Conference on Lasers and Electro-Optics (CLEO), 2018, p.1-2

2018

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Advanced 2D/3D ESD device simulation – a powerful tool already used in a pre-Si phase

Risetime effects of HBM and square pulses on the failure thresholds of GGNMOS-transistors

Does the ESD-failure current obtained by transmission-line pulsing always correlate to human body model tests?

Reproducibility of field failures by ESD models — Comparison of HBM, socketed CDM and non-socketed CDM

Test structures and testing methods for electrostatic discharge: results of PROPHECY project

A new ESD protection concept for VLSI CMOS circuits avoiding circuit stress

Does The Esd-failure Current Obtained By Transmissionline Pulsing Always Correlate To Human Body Model Tests?

Test structures and testing methods for electrostatic discharge : results of PROPHECY project : Special Section : EU Research Project Prophecy Papers

ESD Monitor circuit-a tool to investigate the susceptibility and failure mechanisms of the charged device model

MOS-Degradation in Input and Output Stages of VLSI-CMOS-Circuits Due to Electrostatic Discharge

Analysis of HBM ESD testers and specifications using a fourth-order lumped element model

Design Constraints for NMOS VLSIs Due to Substrate Current

Advanced 2D/3D ESD device simulation-a powerful tool already used in a pre-Si phase

Reproducibility of field failures by ESD models - comparison of HBM, socketed CDM and non-socketed CDM

Risetime effects of HBM and square pulses on the failure thresholds of GGNMOS transistors

Electron dynamics in transition metal dichalcogenides utilizing attosecond transient absorption spectroscopy

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