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Epitaxial Optimization of 130-nm Gate-Length InGaAs/InAlAs/InP HEMTs for High-Frequency Applications
IEEE transactions on electron devices, 2008-01, Vol.55 (1), p.268-275
2008
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Extraction of emitter and base series resistances of bipolar transistors from a single DC measurement
IEEE transactions on semiconductor manufacturing, 2000-05, Vol.13 (2), p.119-126
2000
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A new test structure for extracting extrinsic parameters in double-polysilicon bipolar transistors
IEEE transactions on electron devices, 2000-09, Vol.47 (9), p.1767-1769
2000
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Characterization of leakage current related to a selectively grown collector in SiGeC heterojunction bipolar transistor structure
Applied surface science, 2004-03, Vol.224 (1), p.336-340
2004
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On DC modeling of the base resistance in bipolar transistors
Solid-state electronics, 2000, Vol.44 (8), p.1411-1418
2000
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A low-complexity 62-GHz fT SiGe heterojunction bipolar transistor process using differential epitaxy and in situ phosphorus-doped poly-Si emitter at very low thermal budget
Solid-state electronics, 2000-03, Vol.44 (3), p.549-554
2000
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The effect of hydrogen passivation on electrical characteristics of double-polysilicon self-aligned bipolar transistors
Solid-state electronics, 1999-03, Vol.43 (3), p.615-620
1999
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Impact on Low-Frequency Noise Properties from Lateral Design of Differentially Grown SiGe HBTs
30th European Solid-State Device Research Conference, 2000, p.564-567
2000
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Comparison of two High-Frequency Noise Characterization Methods for SiGe HBTs
30th European Solid-State Device Research Conference, 2000, p.372-375
2000
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Extraction of the intrinsic base region sheet resistance in bipolar transistors
Proceedings of the 2000 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat. No.00CH37124), 2000, p.184-186
2000
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A new test structure for direct extraction of SPICE model parameters for double polysilicon bipolar transistors
ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307), 1999, p.30-33
1999
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A procedure for characterizing the BJT base resistance and Early voltages utilizing a dual base transistor test structure
ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153), 2001, p.31-36
2001
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A new test structure for parasitic resistance extraction in bipolar transistors
ICMTS 2001. Proceedings of the 2001 International Conference on Microelectronic Test Structures (Cat. No.01CH37153), 2001, p.25-30
2001
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A new procedure for extraction of series resistances for bipolar transistors from DC measurements
ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307), 1999, p.147-151
1999
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A high speed SiGe HBT process using non-selective epitaxy and in situ phosphorus doped polysilicon emitter: Optimization of device design rules
29th European Solid-State Device Research Conference, 1999, Vol.1, p.728-731
1999
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Control of The Sb Redistribution in Strained SiGe Layers Using Point Defect Injection
MRS proceedings, 1998-01, Vol.510, Article 119
1998
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