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Handbook of 3D Integration, Volume 4: Design, Test, and Thermal Management

1, 2019

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Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods

Journal of electronic testing, 2012-02, Vol.28 (1), p.27-38

2012

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2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning

IEEE transactions on computer-aided design of integrated circuits and systems, 2021-06, Vol.40 (6), p.1217-1229

2021

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Appliance Identification Algorithm for a Non-Intrusive Home Energy Monitor Using Cogent Confabulation

IEEE transactions on smart grid, 2019-01, Vol.10 (1), p.714-721

2019

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Scaling constraints in nanoelectronic random-access memories

Nanotechnology, 2005-10, Vol.16 (10), p.2251-2260

2005

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3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model

IEEE transactions on circuits and systems. I, Regular papers, 2019-02, Vol.66 (2), p.756-768

2019

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An electronically tunable microstrip bandpass filter using thin-film Barium-Strontium-Titanate (BST) varactors

IEEE transactions on microwave theory and techniques, 2005-09, Vol.53 (9), p.2707-2712

2005

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Asymmetric Transformer Design with Multiband Frequency Response for Simultaneous Power and Data Transfer

IEEE transactions on components, packaging, and manufacturing technology (2011), 2020-04, Vol.10 (4), p.1-1

2020

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RF-Only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications

IEEE transactions on circuits and systems. I, Regular papers, 2018-01, Vol.65 (1), p.406-418

2018

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On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

Journal of electronic materials, 2018-02, Vol.47 (2), p.994-997

2018

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A 125 μm × 245 μm Mainly Digital UHF EPC Gen2 Compatible RFID Tag in 55 nm CMOS Process

IEEE journal of radio frequency identification (Online), 2021-09, Vol.5 (3), p.317-323

2021

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SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications

IEEE transactions on circuits and systems. 1, Fundamental theory and applications, 2007-02, Vol.54 (2), p.420-431

2007

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Corrections to "Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding"[ Aug 13 1562-1567]

IEEE transactions on very large scale integration (VLSI) systems, 2017-05, Vol.25 (5), p.1792-1792

2017

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Exploring the Tradeoffs of Application-Specific Processing

IEEE journal on emerging and selected topics in circuits and systems, 2018-09, Vol.8 (3), p.531-542

2018

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Controlled Modulation of Conductance in Silicon Devices by Molecular Monolayers

Journal of the American Chemical Society, 2006-11, Vol.128 (45), p.14537-14541

2006

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A Generally Applicable Calibration Algorithm for Digitally Reconfigurable Self-Healing RFICs

IEEE transactions on very large scale integration (VLSI) systems, 2016-03, Vol.24 (3), p.1151-1164

2016

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Controllable Molecular Modulation of Conductivity in Silicon-Based Devices

Journal of the American Chemical Society, 2009-07, Vol.131 (29), p.10023-10030

2009

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A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory

IEEE transactions on very large scale integration (VLSI) systems, 2014-12, Vol.22 (12), p.2701-2712

2014

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A Bounded and Discretized Nelder-Mead Algorithm Suitable for RFIC Calibration

IEEE transactions on circuits and systems. I, Regular papers, 2013-07, Vol.60 (7), p.1787-1799

2013

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Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding

IEEE transactions on very large scale integration (VLSI) systems, 2013-08, Vol.21 (8), p.1562-1567

2013

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Multimode High-Density Link Design Methodology and Implementation

IEEE transactions on components, packaging, and manufacturing technology (2011), 2016-08, Vol.6 (8), p.1251-1260

2016

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Adaptive and Reliable Clock Distribution Design for 3-D Integrated Circuits

IEEE transactions on components, packaging, and manufacturing technology (2011), 2014-11, Vol.4 (11), p.1862-1870

2014

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Accurate and Scalable IO Buffer Macromodel Based on Surrogate Modeling

IEEE transactions on components, packaging, and manufacturing technology (2011), 2011-08, Vol.1 (8), p.1240-1249

2011

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NanoCell Electronic Memories

Journal of the American Chemical Society, 2003-10, Vol.125 (43), p.13279-13283

2003

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Thermal Pathfinding for 3-D ICs

IEEE transactions on components, packaging, and manufacturing technology (2011), 2014-07, Vol.4 (7), p.1159-1168

2014

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Handbook of 3D Integration, Volume 4: Design, Test, and Thermal Management

Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods

2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning

Appliance Identification Algorithm for a Non-Intrusive Home Energy Monitor Using Cogent Confabulation

Scaling constraints in nanoelectronic random-access memories

3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model

An electronically tunable microstrip bandpass filter using thin-film Barium-Strontium-Titanate (BST) varactors

Asymmetric Transformer Design with Multiband Frequency Response for Simultaneous Power and Data Transfer

RF-Only Logic: an Area Efficient Logic Family for RF-Power Harvesting Applications

On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

A 125 μm × 245 μm Mainly Digital UHF EPC Gen2 Compatible RFID Tag in 55 nm CMOS Process

SOI CMOS Implementation of a Multirate PSK Demodulator for Space Communications

Corrections to "Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding"[ Aug 13 1562-1567]

Exploring the Tradeoffs of Application-Specific Processing

Controlled Modulation of Conductance in Silicon Devices by Molecular Monolayers

A Generally Applicable Calibration Algorithm for Digitally Reconfigurable Self-Healing RFICs

Controllable Molecular Modulation of Conductivity in Silicon-Based Devices

A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory

A Bounded and Discretized Nelder-Mead Algorithm Suitable for RFIC Calibration

Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding

Multimode High-Density Link Design Methodology and Implementation

Adaptive and Reliable Clock Distribution Design for 3-D Integrated Circuits

Accurate and Scalable IO Buffer Macromodel Based on Surrogate Modeling

NanoCell Electronic Memories

Thermal Pathfinding for 3-D ICs

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