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Measuring Holding Voltage Related to Homogeneous Current Flow in Wide ESD Protection Structures Using Multilevel TLP

IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.411-418

2011

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Quantitative internal thermal energy mapping of semiconductor devices under short current stress using backside laser interferometry

IEEE transactions on electron devices, 2002-11, Vol.49 (11), p.2070-2079

2002

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Advanced 2D/3D ESD device simulation – a powerful tool already used in a pre-Si phase

Microelectronics and reliability, 2001-11, Vol.41 (11), p.1761-1770

2001

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Transient latch-up: experimental analysis and device simulation

Microelectronics and reliability, 2005-02, Vol.45 (2), p.297-304

2005

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Thermal and free carrier concentration mapping during ESD event in smart Power ESD protection devices using an improved laser interferometric technique

Microelectronics and reliability, 2000-08, Vol.40 (8-10), p.1365-1370

2000

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High abstraction level permutational ESD concept analysis

Microelectronics and reliability, 2005-02, Vol.45 (2), p.313-321

2005

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Harnessing the base-pushout effect for ESD protection in bipolar and BiCMOS technologies

Microelectronics and reliability, 2003-07, Vol.43 (7), p.1001-1010

2003

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Characterization and modeling of transient device behavior under CDM ESD stress

Journal of electrostatics, 2004-10, Vol.62 (2), p.133-153

2004

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Test circuits for fast and reliable assessment of CDM robustness of I/O stages

Microelectronics and reliability, 2005-02, Vol.45 (2), p.269-277

2005

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Study of triggering inhomogeneities in gg-nMOS ESD protection devices via thermal mapping using backside laser interferometry

Microelectronics and reliability, 2000-08, Vol.40 (8-10), p.1359-1364

2000

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Case study of a technology transfer causing ESD problems

Microelectronics and reliability, 2002-09, Vol.42 (9), p.1275-1280

2002

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Measuring Holding Voltage Related to Homogeneous Current Flow in Wide ESD Protection Structures Using Multilevel TLP

IEEE transactions on electron devices, 2011, Vol.58 (2), p.411-418

2011

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Device Simulation and Backside Laser Interferometry––Powerful Tools for ESD Protection Development

Microelectronics and reliability, 2002-09, Vol.42 (9), p.1267-1274

2002

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Bulk and surface degradation mode in 0.35μm technology gg-nMOS ESD protection devices

Microelectronics and reliability, 2000-08, Vol.40 (8-10), p.1467-1472

2000

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Effect of pulse risetime on trigger homogeneity in single finger grounded gate nMOSFET electrostatic discharge protection devices

Microelectronics and reliability, 2001, Vol.41 (9), p.1385-1390

2001

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ESD compact-simulation: investigation of inverter failure

Advances in radio science, 2003-05, Vol.1 (9), p.285-288

2003

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Investigation of ESD protection elements under high current stress in CDM-like time domain using backside laser interferometry

Journal of electrostatics, 2003-10, Vol.59 (3), p.241-255

2003

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Reliability aspects of gate oxide under ESD pulse stress

2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2009, Vol.49 (12), p.6A.1-1-6A.1-10

2009

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Wide range control of the sustaining voltage of electrostatic discharge protection elements realized in a smart power technology

Microelectronics and reliability, 2001-03, Vol.41 (3), p.385-393

2001

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Base pushout driven snapback in parasitic bipolar devices between different power domains

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004, p.387-392

2004

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Chip-level ESD simulation for fail detection and design guidance

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004, p.603-604

2004

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Test structures and testing methods for electrostatic discharge: results of PROPHECY project

Microelectronics and reliability, 1999, Vol.39 (5), p.635-646

1999

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Transient behavior of SCRS during ESD pulses

2008 IEEE International Reliability Physics Symposium, 2008, p.247-253

2008

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Social Power and Conversion of Capital: Sune Ebbesen of Zealand

Nordic Elites in Transformation, c. 1050-1250, Volume II, 2020, p.285-303

1, 2020

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Angels in Scandinavia: Papal Legates and Networks of Nordic Elites, Twelfth-Thirteenth Centuries

Nordic Elites in Transformation, c. 1050-1250, Volume II, 2020, p.169-191

1, 2020

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Measuring Holding Voltage Related to Homogeneous Current Flow in Wide ESD Protection Structures Using Multilevel TLP

Quantitative internal thermal energy mapping of semiconductor devices under short current stress using backside laser interferometry

Advanced 2D/3D ESD device simulation – a powerful tool already used in a pre-Si phase

Transient latch-up: experimental analysis and device simulation

Thermal and free carrier concentration mapping during ESD event in smart Power ESD protection devices using an improved laser interferometric technique

High abstraction level permutational ESD concept analysis

Harnessing the base-pushout effect for ESD protection in bipolar and BiCMOS technologies

Characterization and modeling of transient device behavior under CDM ESD stress

Test circuits for fast and reliable assessment of CDM robustness of I/O stages

Study of triggering inhomogeneities in gg-nMOS ESD protection devices via thermal mapping using backside laser interferometry

Case study of a technology transfer causing ESD problems

Measuring Holding Voltage Related to Homogeneous Current Flow in Wide ESD Protection Structures Using Multilevel TLP

Device Simulation and Backside Laser Interferometry––Powerful Tools for ESD Protection Development

Bulk and surface degradation mode in 0.35μm technology gg-nMOS ESD protection devices

Effect of pulse risetime on trigger homogeneity in single finger grounded gate nMOSFET electrostatic discharge protection devices

ESD compact-simulation: investigation of inverter failure

Investigation of ESD protection elements under high current stress in CDM-like time domain using backside laser interferometry

Reliability aspects of gate oxide under ESD pulse stress

Wide range control of the sustaining voltage of electrostatic discharge protection elements realized in a smart power technology

Base pushout driven snapback in parasitic bipolar devices between different power domains

Chip-level ESD simulation for fail detection and design guidance

Test structures and testing methods for electrostatic discharge: results of PROPHECY project

Transient behavior of SCRS during ESD pulses

Social Power and Conversion of Capital: Sune Ebbesen of Zealand

Angels in Scandinavia: Papal Legates and Networks of Nordic Elites, Twelfth-Thirteenth Centuries

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