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High speed robust current sense amplifier for nanoscale memories: a winner take all approach

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006, p.6 pp.

2006

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NC-SRAM - a low-leakage memory circuit for ultra deep submicron designs

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings, 2003, p.3-6

2003

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CacheLeakage: A leakage aware cache simulator

2007 50th Midwest Symposium on Circuits and Systems, 2007, p.313-316

2007

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DG-SRAM: a low leakage memory circuit

Proceedings 2005 IEEE International SOC Conference, 2005, p.167-170

2005

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Leakage aware SER reduction technique for UDSM logic circuits

IEEE International SOC Conference, 2004. Proceedings, 2004, p.82-85

2004

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CHIDDAM: a data mining based technique for cache hierarchy determination in commercial applications

48th Midwest Symposium on Circuits and Systems, 2005, 2005, p.1888-1891 Vol. 2

2005

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Optimal V/sub th/ assignment and buffer insertion for simultaneous leakage and glitch minimization though integer linear programming (ILP)

48th Midwest Symposium on Circuits and Systems, 2005, 2005, p.1880-1883 Vol. 2

2005

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Electrically driven optical proximity correction based on linear programming

2008 IEEE/ACM International Conference on Computer-Aided Design, 2008, p.473-479

2008

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Time Redundancy Based Scan Flip-Flop Reuse To Reduce SER Of Combinational Logic

7th International Symposium on Quality Electronic Design (ISQED'06), 2006, p.617-624

2006

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Leakage Reduction for Domino Circuits in Sub-65nm Technologies

2006 IEEE International SOC Conference, 2006, p.164-167

2006

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RG-SRAM: a low gate leakage memory design

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05), 2005, p.295-296

2005

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SRAM Local Bit Line Access Failure Analyses

7th International Symposium on Quality Electronic Design (ISQED'06), 2006, p.204-209

2006

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ECG artefacts mimicking atrial flutter in posterior fossa surgery

BMJ case reports, 2015-05, Vol.2015, p.bcr2014208617

2015

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Prolonged apnea after small single dose of intravenous tramadol

AANA journal, 2010-04, Vol.78 (2), p.110

2010

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High speed robust current sense amplifier for nanoscale memories: a winner take all approach

NC-SRAM - a low-leakage memory circuit for ultra deep submicron designs

CacheLeakage: A leakage aware cache simulator

DG-SRAM: a low leakage memory circuit

Leakage aware SER reduction technique for UDSM logic circuits

CHIDDAM: a data mining based technique for cache hierarchy determination in commercial applications

Optimal V/sub th/ assignment and buffer insertion for simultaneous leakage and glitch minimization though integer linear programming (ILP)

Electrically driven optical proximity correction based on linear programming

Time Redundancy Based Scan Flip-Flop Reuse To Reduce SER Of Combinational Logic

Leakage Reduction for Domino Circuits in Sub-65nm Technologies

RG-SRAM: a low gate leakage memory design

SRAM Local Bit Line Access Failure Analyses

ECG artefacts mimicking atrial flutter in posterior fossa surgery

Prolonged apnea after small single dose of intravenous tramadol

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