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Resource allocation for coarse-grain FPGA development

IEEE transactions on computer-aided design of integrated circuits and systems, 2005-10, Vol.24 (10), p.1572-1581

2005

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FPGA-based ORB feature extraction for real-time visual SLAM

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.275-278

2017

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PipeCNN: An OpenCL-based open-source FPGA accelerator for convolution neural networks

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.279-282

2017

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Querying encrypted data

2013 IEEE 29th International Conference on Data Engineering (ICDE), 2013, p.1262-1263

2013

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Architecture-adaptive range limit windowing for simulated annealing FPGA placement

Annual ACM IEEE Design Automation Conference: Proceedings of the 42nd annual conference on Design automation; 13-17 June 2005, 2005, p.439-444

2005

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An object detector based on multiscale sliding window search using a fully pipelined binarized CNN on an FPGA

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.168-175

2017

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An FPGA-based processor for training convolutional neural networks

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.207-210

2017

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Instruction driven cross-layer CNN accelerator with winograd transformation on FPGA

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.227-230

2017

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Designing and accelerating spiking neural networks using OpenCL for FPGAs

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.255-258

2017

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Automatic circuit design and modelling for heterogeneous FPGAs

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.9-16

2017

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FPGA-based training of convolutional neural networks with a reduced precision floating-point library

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.239-242

2017

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Liquid: High quality scalable placement for large heterogeneous FPGAs

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.17-24

2017

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All binarized convolutional neural network and its implementation on an FPGA

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.291-294

2017

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HopliteRT: An efficient FPGA NoC for real-time applications

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.64-71

2017

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Single window stream aggregation using reconfigurable hardware

16th IEEE International Conference on Field-Programmable Technology (ICFPT), Melbourne, Australia, 2017, Vol.2018-January, p.112-119

2017

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Toward a new HLS-based methodology for FPGA benchmarking of candidates in cryptographic competitions: The CAESAR contest case study

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.120-127

2017

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A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.235-238

2017

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Customizable FPGA OpenCL matrix multiply design template for deep neural networks

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.259-262

2017

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FPGA-based accelerator for losslessly quantized convolutional neural networks

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.295-298

2017

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Accelerating NFV application using CPU-FPGA tightly coupled architecture

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.136-143

2017

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FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.299-300

2017

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A 42fps full-HD ORB feature extraction accelerator with reduced memory overhead

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.183-190

2017

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Enhancing timing-driven FPGA placement for pipelined netlists

2008 45th ACM/IEEE Design Automation Conference, 2008, p.34-37

2008

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RBSA: Range-based simulated annealing for FPGA placement

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.1-8

2017

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Pass a pointer: Exploring shared virtual memory abstractions in OpenCL tools for FPGAs

2017 International Conference on Field Programmable Technology (ICFPT), 2017, p.104-111

2017

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Resource allocation for coarse-grain FPGA development

FPGA-based ORB feature extraction for real-time visual SLAM

PipeCNN: An OpenCL-based open-source FPGA accelerator for convolution neural networks

Querying encrypted data

Architecture-adaptive range limit windowing for simulated annealing FPGA placement

An object detector based on multiscale sliding window search using a fully pipelined binarized CNN on an FPGA

An FPGA-based processor for training convolutional neural networks

Instruction driven cross-layer CNN accelerator with winograd transformation on FPGA

Designing and accelerating spiking neural networks using OpenCL for FPGAs

Automatic circuit design and modelling for heterogeneous FPGAs

FPGA-based training of convolutional neural networks with a reduced precision floating-point library

Liquid: High quality scalable placement for large heterogeneous FPGAs

All binarized convolutional neural network and its implementation on an FPGA

HopliteRT: An efficient FPGA NoC for real-time applications

Single window stream aggregation using reconfigurable hardware

Toward a new HLS-based methodology for FPGA benchmarking of candidates in cryptographic competitions: The CAESAR contest case study

A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption

Customizable FPGA OpenCL matrix multiply design template for deep neural networks

FPGA-based accelerator for losslessly quantized convolutional neural networks

Accelerating NFV application using CPU-FPGA tightly coupled architecture

FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system

A 42fps full-HD ORB feature extraction accelerator with reduced memory overhead

Enhancing timing-driven FPGA placement for pipelined netlists

RBSA: Range-based simulated annealing for FPGA placement

Pass a pointer: Exploring shared virtual memory abstractions in OpenCL tools for FPGAs

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