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A fast-switching low-loss field-stop IGBT with dual control gate of SIPOS material

Applied physics letters, 2024-07, Vol.125 (2)

2024

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New Superjunction LDMOS Breaking Silicon Limit by Electric Field Modulation of Buffered Step Doping

IEEE electron device letters, 2015-01, Vol.36 (1), p.47-49

2015

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IEEE_Xplore

Complete 3D-Reduced Surface Field Superjunction Lateral Double-Diffused MOSFET Breaking Silicon Limit

IEEE electron device letters, 2015-12, Vol.36 (12), p.1348-1350

2015

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IEEE_Xplore

SiC gate-controlled bipolar field effect composite transistor with polysilicon region for improving on-state current

Chinese physics B, 2023-03, Vol.32 (4), p.47702-745

2023

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Low Specific on-Resistance Power MOS Transistor With Multilayer Carrier Accumulation Breaks the Limit Line of Silicon

IEEE transactions on electron devices, 2011-07, Vol.58 (7), p.2057-2060

2011

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IEEE_Xplore

Analysis of SiC/Si Heterojunction Band Energy and Interface State Characteristics for SiC/Si VDMOS

Micromachines (Basel), 2023-09, Vol.14 (10), p.1890

2023

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GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance

Micromachines (Basel), 2023-05, Vol.14 (6), p.1166

2023

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Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench

Chinese physics B, 2022-03, Vol.31 (4), p.47304-737

2022

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New Superjunction LDMOS With the Complete Charge Compensation by the Electric Field Modulation

IEEE electron device letters, 2014-11, Vol.35 (11), p.1115-1117

2014

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IEEE_Xplore

Novel fast-switching LIGBT with P-buried layer and partial SOI

Chinese physics B, 2021-02, Vol.30 (2), p.27302-525

2021

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A Superjunction U-MOSFET With SIPOS Pillar Breaking Superjunction Silicon Limit by TCAD Simulation Study

IEEE electron device letters, 2017-06, Vol.38 (6), p.794-797

2017

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IEEE_Xplore

Theoretical Analyses of Complete 3-D Reduced Surface Field LDMOS With Folded-Substrate Breaking Limit of Superjunction LDMOS

IEEE transactions on electron devices, 2016-12, Vol.63 (12), p.4865-4872

2016

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IEEE_Xplore

Novel Si/SiC heterojunction lateral double-diffused metal–oxide semiconductor field-effect transistor with p-type buried layer breaking silicon limit

Chinese physics B, 2021-03, Vol.30 (4), p.48503-694

2021

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Novel Si/SiC Heterojunction Lateral Double-Diffused Metal Oxide Semiconductor With SIPOS Field Plate by Simulation Study

IEEE journal of the Electron Devices Society, 2021, Vol.9, p.114-120

2021

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Novel Low Loss LIGBT With Assisted Depletion N-Region and P-Buried Layer

IEEE journal of the Electron Devices Society, 2021, Vol.9, p.409-414

2021

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New Superjunction LDMOS With N-Type Charges' Compensation Layer

IEEE electron device letters, 2009-03, Vol.30 (3), p.305-307

2009

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IEEE_Xplore

Unified Analytical Model for SOI LDMOS With Electric Field Modulation

IEEE journal of the Electron Devices Society, 2020, Vol.8, p.686-694

2020

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Analytical model of LDMOS with a double step buried oxide layer

Solid-state electronics, 2016-09, Vol.123, p.6-14

2016

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Novel Power MOSFET With Partial SiC/Si Heterojunction to Improve Breakdown Voltage by Breakdown Point Transfer (BPT) Terminal Technology

IEEE journal of the Electron Devices Society, 2020, Vol.8, p.559-564

2020

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Folded-Accumulation LDMOST: New Power MOS Transistor With Very Low Specific On-Resistance

IEEE electron device letters, 2009-12, Vol.30 (12), p.1329-1331

2009

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IEEE_Xplore

Thermal Field Analysis for New AlGaN/GaN HEMT With Partial Etched AlGaN Layer

IEEE journal of the Electron Devices Society, 2020, Vol.8, p.442-447

2020

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New thin-film power MOSFETs with a buried oxide double step structure

IEEE electron device letters, 2006-05, Vol.27 (5), p.377-379

2006

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IEEE_Xplore

High PSRR bandgap reference used in boost circuit

AIP Conference Proceedings, 2017, Vol.1820 (1)

2017

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Novel Step Floating Islands VDMOS with Low Specific on-Resistance by TCAD Simulation

Micromachines (Basel), 2022-04, Vol.13 (4), p.573

2022

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High voltage REBULF LDMOS with N + buried layer

Solid-state electronics, 2010-07, Vol.54 (7), p.685-688

2010

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A fast-switching low-loss field-stop IGBT with dual control gate of SIPOS material

New Superjunction LDMOS Breaking Silicon Limit by Electric Field Modulation of Buffered Step Doping

Complete 3D-Reduced Surface Field Superjunction Lateral Double-Diffused MOSFET Breaking Silicon Limit

SiC gate-controlled bipolar field effect composite transistor with polysilicon region for improving on-state current

Low Specific on-Resistance Power MOS Transistor With Multilayer Carrier Accumulation Breaks the Limit Line of Silicon

Analysis of SiC/Si Heterojunction Band Energy and Interface State Characteristics for SiC/Si VDMOS

GaN/Si Heterojunction VDMOS with High Breakdown Voltage and Low Specific On-Resistance

Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench

New Superjunction LDMOS With the Complete Charge Compensation by the Electric Field Modulation

Novel fast-switching LIGBT with P-buried layer and partial SOI

A Superjunction U-MOSFET With SIPOS Pillar Breaking Superjunction Silicon Limit by TCAD Simulation Study

Theoretical Analyses of Complete 3-D Reduced Surface Field LDMOS With Folded-Substrate Breaking Limit of Superjunction LDMOS

Novel Si/SiC heterojunction lateral double-diffused metal–oxide semiconductor field-effect transistor with p-type buried layer breaking silicon limit

Novel Si/SiC Heterojunction Lateral Double-Diffused Metal Oxide Semiconductor With SIPOS Field Plate by Simulation Study

Novel Low Loss LIGBT With Assisted Depletion N-Region and P-Buried Layer

New Superjunction LDMOS With N-Type Charges' Compensation Layer

Unified Analytical Model for SOI LDMOS With Electric Field Modulation

Analytical model of LDMOS with a double step buried oxide layer

Novel Power MOSFET With Partial SiC/Si Heterojunction to Improve Breakdown Voltage by Breakdown Point Transfer (BPT) Terminal Technology

Folded-Accumulation LDMOST: New Power MOS Transistor With Very Low Specific On-Resistance

Thermal Field Analysis for New AlGaN/GaN HEMT With Partial Etched AlGaN Layer

New thin-film power MOSFETs with a buried oxide double step structure

High PSRR bandgap reference used in boost circuit

Novel Step Floating Islands VDMOS with Low Specific on-Resistance by TCAD Simulation

High voltage REBULF LDMOS with N + buried layer

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