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CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis

IEE proceedings. Circuits, devices, and systems, 2006, Vol.153 (6), p.539-544

2006

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A trigonometric formulation of the LMS algorithm for realization on pipelined CORDIC

IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 2005-09, Vol.52 (9), p.530-534

2005

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VLSI architecture for parallel radix-4 CORDIC

Microprocessors and microsystems, 2013-02, Vol.37 (1), p.79-86

2013

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A novel viscoplastic model of high-density polyethylene pipe material

Geosynthetics international, 2015-04, Vol.22 (2), p.173-182

2015

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VLSI architecture for low latency radix-4 CORDIC

Computers & electrical engineering, 2011-11, Vol.37 (6), p.1032-1042

2011

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Analog sampled data architecture for discrete cosine transform

ASIC, 2003. Proceedings. 5th International Conference on, 2003, Vol.1, p.502-505 Vol.1

2003

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A VLSI array architecture for realization of DFT, DHT, DCT and DST

Signal processing, 2001-09, Vol.81 (9), p.1813-1822

2001

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Design issues in switched capacitor ladder filters

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005, p.862-865

2005

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Liner Buckling in Profiled Polyethylene Pipes

Geosynthetics international, 2001-01, Vol.8 (4), p.303-326

2001

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FPGA implementation of a high speed VLSI architecture for CORDIC

TENCON 2009 - 2009 IEEE Region 10 Conference, 2009, p.1-5

2009

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High speed architectural implementation of CORDIC algorithm

TENCON 2008 - 2008 IEEE Region 10 Conference, 2008, p.1-5

2008

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Low Latency VLSI Architecture for the Radix-4 CORDIC Algorithm

2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems, 2008, p.1-5

2008

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CORDIC realization of the transversal adaptive filter using a trigonometric LMS algorithm

2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221), 2001, Vol.2, p.1225-1228 vol.2

2001

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Analog sampled data architecture for discrete Hartley transform

TENCON 2003. Conference on Convergent Technologies for Asia-Pacific Region, 2003, Vol.3, p.1035-1039 Vol.3

2003

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VLSI implementation of discrete Mellin transform for real time scale analysis of images

TENCON 2009 - 2009 IEEE Region 10 Conference, 2009, p.1-6

2009

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VLSI Architecture for Separable Mellin Transform

2009 Annual IEEE India Conference, 2009, p.1-4

2009

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ASIC Architecture for Implementing Blackman Windowing for Real Time Spectral Analysis

2007 International Conference on Signal Processing, Communications and Networking, 2007, p.388-391

2007

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Array architecture for computing discrete fourier transform to assist semiconductor device modelling

Electronics letters, 1992, Vol.28 (7), p.697-698

1992

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Dynamic Capacity Allocation for Voice and Data Adaptive Using Adaptive Modulation in Wireless Networks

2006 IFIP International Conference on Wireless and Optical Communications Networks, 2006, p.1-4

2006

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An Array Architecture for Computing KLT Basis Vectors

The Fifth International Conference on VLSI Design, 1992, p.167-170

Dhar, A.S.

1992

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Sampled analog architecture for DCT and DST

2004 IEEE International Symposium on Circuits and Systems (ISCAS), 2004, Vol.2, p.II-825

2004

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Digital controlled analog architecture for DCT and DST using capacitor switching

2004 IEEE International Symposium on Circuits and Systems (ISCAS), 2004, Vol.2, p.II-309

2004

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Doppler ultrasonograph with CORDIC based spectrum analyzer for blood flow velocity estimation

Proceedings of the First Regional Conference, IEEE Engineering in Medicine and Biology Society and 14th Conference of the Biomedical Engineering Society of India. An International Meet, 1995, p.2/107-2/108

1995

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Analog VLSI architecture for discrete cosine transform using dynamic switched capacitors

17th International Conference on VLSI Design. Proceedings, 2004, p.666-669

2004

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High Throughput VLSI Architecture for One Dimensional Median Filter

2008 International Conference on Signal Processing, Communications and Networking, 2008, p.339-344

2008

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CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis

A trigonometric formulation of the LMS algorithm for realization on pipelined CORDIC

VLSI architecture for parallel radix-4 CORDIC

A novel viscoplastic model of high-density polyethylene pipe material

VLSI architecture for low latency radix-4 CORDIC

Analog sampled data architecture for discrete cosine transform

A VLSI array architecture for realization of DFT, DHT, DCT and DST

Design issues in switched capacitor ladder filters

Liner Buckling in Profiled Polyethylene Pipes

FPGA implementation of a high speed VLSI architecture for CORDIC

High speed architectural implementation of CORDIC algorithm

Low Latency VLSI Architecture for the Radix-4 CORDIC Algorithm

CORDIC realization of the transversal adaptive filter using a trigonometric LMS algorithm

Analog sampled data architecture for discrete Hartley transform

VLSI implementation of discrete Mellin transform for real time scale analysis of images

VLSI Architecture for Separable Mellin Transform

ASIC Architecture for Implementing Blackman Windowing for Real Time Spectral Analysis

Array architecture for computing discrete fourier transform to assist semiconductor device modelling

Dynamic Capacity Allocation for Voice and Data Adaptive Using Adaptive Modulation in Wireless Networks

An Array Architecture for Computing KLT Basis Vectors

Sampled analog architecture for DCT and DST

Digital controlled analog architecture for DCT and DST using capacitor switching

Doppler ultrasonograph with CORDIC based spectrum analyzer for blood flow velocity estimation

Analog VLSI architecture for discrete cosine transform using dynamic switched capacitors

High Throughput VLSI Architecture for One Dimensional Median Filter

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