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Explaining the amplitude of RTS noise in submicrometer MOSFETs

IEEE transactions on electron devices, 1992-02, Vol.39 (2), p.422-429

1992

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The multistable charge-controlled memory effect in SOI MOS transistors at low temperatures

IEEE transactions on electron devices, 1990-05, Vol.37 (5), p.1373-1382

1990

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Theory of the MOS transistor in weak inversion-new method to determine the number of surface states

IEEE transactions on electron devices, 1975-05, Vol.22 (5), p.282-288

1975

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A self-aligned CoSi2interconnection and contact technology for VLSI applications

IEEE transactions on electron devices, 1987-03, Vol.34 (3), p.554-561

1987

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Optical and electrical properties of reactively d.c. magnetron-sputtered In 2O 3:Sn films

Thin solid films, 1984, Vol.121 (2), p.109-119

1984

Volltextzugriff (PDF)

Short-channel pMOSTs in a high-resistivity silicon substrate. I. Analytical model

IEEE transactions on electron devices, 1992-10, Vol.39 (10), p.2268-2277

1992

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Correlation between the diffusion of borons atoms and the growth kinetics of oxidation-induced stacking faults

Revue de physique appliquée, 1978-01, Vol.13 (12), p.797-801

1978

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Short-channel pMOSTs in a high-resistivity silicon substrate. II. Noise performance

IEEE transactions on electron devices, 1992-10, Vol.39 (10), p.2278-2283

1992

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Anomalous kink-related excess noise in MOSFETs at 4.2 K

IEEE transactions on electron devices, 1991-04, Vol.38 (4), p.907-912

1991

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Observation of hot-hole injection in NMOS transistors using a modified floating-gate technique

IEEE transactions on electron devices, 1986-10, Vol.33 (10), p.1529-1534

1986

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Two- and three-dimensional calculation of substrate resistance

IEEE transactions on electron devices, 1988-03, Vol.35 (3), p.339-352

1988

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Optical and electrical properties of reactively d.c. magnetron-sputtered In2O3:Sn films

Thin solid films, 1984-11, Vol.121 (2), p.109-119

1984

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The influence of the drain multiplication current on latchup behavior

IEEE transactions on electron devices, 1988-11, Vol.35 (11), p.1810-1819

1988

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The DEPLI sensor: A new structure for very-high-resolution imagers

IEEE transactions on electron devices, 1985-08, Vol.32 (8), p.1551-1558

1985

Volltextzugriff (PDF)

Advanced CMOS gate array architecture combining `gate isolation' and programmable routing channels

IEEE journal of solid-state circuits, 1985-04, Vol.20 (2), p.469-480

1985

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Programmable transversal filter using BBD and dynamic amplifiers

IEEE journal of solid-state circuits, 1984-02, Vol.19 (1), p.157-159

1984

Volltextzugriff (PDF)

A self-aligned CoSi 2 interconnection and contact technology for VLSI applications

IEEE transactions on electron devices, 1987-03, Vol.34 (3), p.554-561

1987

Volltextzugriff (PDF)

Characterization of dark current non-uniformities in charge-coupled devices

Solid-state electronics, 1984-01, Vol.27 (2), p.147-154

1984

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Linear CCD-Imagers with a polyimide insulation for double level metallization

IEEE electron device letters, 1982-10, Vol.3 (10), p.308-309

1982

Volltextzugriff (PDF)

A novel quadrilinear CCD for high resolution line arrays

IEEE transactions on electron devices, 1983-12, Vol.30 (12), p.1776-1779

1983

Volltextzugriff (PDF)

A new method for the two-dimensional calculation of the potential distribution in a buried-channel charge-coupled device: Theory and experimental verification

IEEE transactions on electron devices, 1981-03, Vol.28 (3), p.313-321

1981

Volltextzugriff (PDF)

Programmable transversal filter

Electronics letters, 1981-08, Vol.17 (17), p.605-606

1981

Volltextzugriff (PDF)

Experimental results on three-phase Polysilicon CCD's with a TCE-SiO2/Si3N4gate insulator

IEEE transactions on electron devices, 1976-02, Vol.23 (2), p.297-299

1976

Volltextzugriff (PDF)

Experimental results on three-phase Polysilicon CCD's with a TCE-SiO 2 /Si 3 N 4 gate insulator

IEEE transactions on electron devices, 1976-02, Vol.23 (2), p.297-299

1976

Volltextzugriff (PDF)

Experimental results on three-phase polysilicon CCD's with a TCE-SiO/SUB 2//Si/SUB 3/N/SUB 4/ gate insulator

IEEE journal of solid-state circuits, 1976-02, Vol.11 (1), p.229-231

1976

Volltextzugriff (PDF)

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Explaining the amplitude of RTS noise in submicrometer MOSFETs

The multistable charge-controlled memory effect in SOI MOS transistors at low temperatures

Theory of the MOS transistor in weak inversion-new method to determine the number of surface states

A self-aligned CoSi2interconnection and contact technology for VLSI applications

Optical and electrical properties of reactively d.c. magnetron-sputtered In 2O 3:Sn films

Short-channel pMOSTs in a high-resistivity silicon substrate. I. Analytical model

Correlation between the diffusion of borons atoms and the growth kinetics of oxidation-induced stacking faults

Short-channel pMOSTs in a high-resistivity silicon substrate. II. Noise performance

Anomalous kink-related excess noise in MOSFETs at 4.2 K

Observation of hot-hole injection in NMOS transistors using a modified floating-gate technique

Two- and three-dimensional calculation of substrate resistance

Optical and electrical properties of reactively d.c. magnetron-sputtered In2O3:Sn films

The influence of the drain multiplication current on latchup behavior

The DEPLI sensor: A new structure for very-high-resolution imagers

Advanced CMOS gate array architecture combining `gate isolation' and programmable routing channels

Programmable transversal filter using BBD and dynamic amplifiers

A self-aligned CoSi 2 interconnection and contact technology for VLSI applications

Characterization of dark current non-uniformities in charge-coupled devices

Linear CCD-Imagers with a polyimide insulation for double level metallization

A novel quadrilinear CCD for high resolution line arrays

A new method for the two-dimensional calculation of the potential distribution in a buried-channel charge-coupled device: Theory and experimental verification

Programmable transversal filter

Experimental results on three-phase Polysilicon CCD's with a TCE-SiO2/Si3N4gate insulator

Experimental results on three-phase Polysilicon CCD's with a TCE-SiO 2 /Si 3 N 4 gate insulator

Experimental results on three-phase polysilicon CCD's with a TCE-SiO/SUB 2//Si/SUB 3/N/SUB 4/ gate insulator

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