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NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths

IEEE transactions on computers, 2018-07, Vol.67 (7), p.949-959

2018

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Energy-Efficient Recurrent Neural Network With MRAM-Based Probabilistic Activation Functions

IEEE transactions on emerging topics in computing, 2023-04, Vol.11 (2), p.534-540

2023

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Energy-Efficient Nonvolatile Reconfigurable Logic Using Spin Hall Effect-Based Lookup Tables

IEEE transactions on nanotechnology, 2017-01, Vol.16 (1), p.32-43

2017

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High-Accuracy Deep Belief Network: Fuzzy Neural Networks Using MRAM-Based Stochastic Neurons

IEEE journal on exploratory solid-state computational devices and circuits, 2021-12, Vol.7 (2), p.125-131

2021

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Short-Term Long-Term Compute-in-Memory Architecture: A Hybrid Spin/CMOS Approach Supporting Intrinsic Consolidation

IEEE journal on exploratory solid-state computational devices and circuits, 2020-06, Vol.6 (1), p.62-70

2020

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Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization

IEEE access, 2018-01, Vol.6, p.14576-14590

2018

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Autonomous Binarized Focal Loss Enhanced Model Compression Design Using Tensor Train Decomposition

Micromachines (Basel), 2022-10, Vol.13 (10), p.1738

2022

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Hybrid spin-CMOS stochastic spiking neuron for high-speed emulation of In vivo neuron dynamics

Chronic diseases and translational medicine, 2018-07, Vol.12 (4), p.122-129

2018

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Nonuniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation

IEEE transactions on computer-aided design of integrated circuits and systems, 2022-09, Vol.41 (9), p.3157-3161

2022

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Promoting Community of Inquiry in Synchronous Team Design Activities for Remote Engineering Laboratory Instruction

IEEE transactions on education, 2024-02, Vol.67 (1), p.162-170

2024

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A Tunable Majority Gate-Based Full Adder Using Current-Induced Domain Wall Nanomagnets

IEEE transactions on magnetics, 2016-08, Vol.52 (8), p.1-7

2016

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MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance

IEEE transactions on circuits and systems. I, Regular papers, 2019-12, Vol.66 (12), p.4662-4672

2019

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Subthreshold Spintronic Stochastic Spiking Neural Networks With Probabilistic Hebbian Plasticity and Homeostasis

IEEE journal on exploratory solid-state computational devices and circuits, 2019-06, Vol.5 (1), p.43-51

2019

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Progress in Autonomous Fault Recovery of Field Programmable Gate Arrays

ACM computing surveys, 2011-10, Vol.43 (4), p.1-30

2011

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Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance

Journal of physics. D, Applied physics, 2017-12, Vol.50 (50), p.505002

2017

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ApGAN: Approximate GAN for Robust Low Energy Learning From Imprecise Components

IEEE transactions on computers, 2020-03, Vol.69 (3), p.349-360

2020

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Energy Efficient Mobile Service Computing With Differential Spintronic-C-Elements: A Logic-in-Memory Asynchronous Computing Paradigm

IEEE access, 2019, Vol.7, p.55851-55860

2019

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Adaptive Non-Uniform Compressive Sensing Using SOT-MRAM Multi-Bit Precision Crossbar Arrays

IEEE transactions on nanotechnology, 2021, Vol.20, p.224-228

2021

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Spin-Orbit Torque Neuromorphic Fabrics for Low-Leakage Reconfigurable In-Memory Computation

IEEE transactions on electron devices, 2022-04, Vol.69 (4), p.1727-1735

2022

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Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching

IEEE transactions on computer-aided design of integrated circuits and systems, 2017-12, Vol.36 (12), p.2134-2138

2017

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Non-Volatile Spintronic Flip-Flop Design for Energy-Efficient SEU and DNU Resilience

IEEE transactions on magnetics, 2019-03, Vol.55 (3), p.1-11

2019

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PARC: A Novel Design Methodology for Power Analysis Resilient Circuits Using Spintronics

IEEE transactions on nanotechnology, 2019, Vol.18, p.885-889

2019

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Process Variation Sensitivity of Spin-Orbit Torque Perpendicular Nanomagnets in DBNs

IEEE transactions on magnetics, 2021-07, Vol.57 (7), p.1-8

2021

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Towards ultra-efficient QCA reversible circuits

Microprocessors and microsystems, 2017-03, Vol.49, p.127-138

2017

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Scalable Adaptive Spintronic Reconfigurable Logic Using Area-Matched MTJ Design

IEEE transactions on circuits and systems. II, Express briefs, 2016-07, Vol.63 (7), p.678-682

2016

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NV-Clustering: Normally-Off Computing Using Non-Volatile Datapaths

Energy-Efficient Recurrent Neural Network With MRAM-Based Probabilistic Activation Functions

Energy-Efficient Nonvolatile Reconfigurable Logic Using Spin Hall Effect-Based Lookup Tables

High-Accuracy Deep Belief Network: Fuzzy Neural Networks Using MRAM-Based Stochastic Neurons

Short-Term Long-Term Compute-in-Memory Architecture: A Hybrid Spin/CMOS Approach Supporting Intrinsic Consolidation

Read-Tuned STT-RAM and eDRAM Cache Hierarchies for Throughput and Energy Optimization

Autonomous Binarized Focal Loss Enhanced Model Compression Design Using Tensor Train Decomposition

Hybrid spin-CMOS stochastic spiking neuron for high-speed emulation of In vivo neuron dynamics

Nonuniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation

Promoting Community of Inquiry in Synchronous Team Design Activities for Remote Engineering Laboratory Instruction

A Tunable Majority Gate-Based Full Adder Using Current-Induced Domain Wall Nanomagnets

MRAM-Enhanced Low Power Reconfigurable Fabric With Multi-Level Variation Tolerance

Subthreshold Spintronic Stochastic Spiking Neural Networks With Probabilistic Hebbian Plasticity and Homeostasis

Progress in Autonomous Fault Recovery of Field Programmable Gate Arrays

Radiation-hardened MRAM-based LUT for non-volatile FPGA soft error mitigation with multi-node upset tolerance

ApGAN: Approximate GAN for Robust Low Energy Learning From Imprecise Components

Energy Efficient Mobile Service Computing With Differential Spintronic-C-Elements: A Logic-in-Memory Asynchronous Computing Paradigm

Adaptive Non-Uniform Compressive Sensing Using SOT-MRAM Multi-Bit Precision Crossbar Arrays

Spin-Orbit Torque Neuromorphic Fabrics for Low-Leakage Reconfigurable In-Memory Computation

Voltage-Based Concatenatable Full Adder Using Spin Hall Effect Switching

Non-Volatile Spintronic Flip-Flop Design for Energy-Efficient SEU and DNU Resilience

PARC: A Novel Design Methodology for Power Analysis Resilient Circuits Using Spintronics

Process Variation Sensitivity of Spin-Orbit Torque Perpendicular Nanomagnets in DBNs

Towards ultra-efficient QCA reversible circuits

Scalable Adaptive Spintronic Reconfigurable Logic Using Area-Matched MTJ Design

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