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Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks

IET information security, 2011-12, Vol.5 (4), p.181-181

2011

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Hardware Trojan detection by delay and electromagnetic measurements

2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, p.782-787

2015

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Generic Description and Synthesis of LDPC Decoders

IEEE transactions on communications, 2007-11, Vol.55 (11), p.2084-2091

2007

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High speed true random number generator based on open loop structures in FPGAs

Microelectronics, 2009-11, Vol.40 (11), p.1650-1656

2009

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Hardware trojan detection by delay and electromagnetic measurements

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015, p.782-787

2015

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Flexible and reconfigurable receiver architecture for WCDMA systems with low spreading factors

Electronics letters, 2005-01, Vol.41 (1), p.22-24

2005

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Design of high speed AWGN communication channel emulator

Analog integrated circuits and signal processing, 2003-02, Vol.34 (2), p.133-142

2003

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RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs

2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012, p.1173-1178

2012

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A finger configuration algorithm for a reconfigurable Rake receiver

2004 IEEE Wireless Communications and Networking Conference (IEEE Cat. No.04TH8733), 2004, Vol.1, p.311-315 Vol.1

2004

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Analysis of Electromagnetic Information Leakage From Cryptographic Devices With Different Physical Structures

IEEE transactions on electromagnetic compatibility, 2013-06, Vol.55 (3), p.571-580

2013

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Integrating a QPSK Quantum Key Distribution Link

2006 European Conference on Optical Communications, 2006, p.1-2

2006

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Efficient Evaluation of EM Radiation Associated With Information Leakage From Cryptographic Devices

IEEE transactions on electromagnetic compatibility, 2013-06, Vol.55 (3), p.555-563

2013

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Implementation of a digital receiver for DS-CDMA communication systems using HW/SW codesign

48th Midwest Symposium on Circuits and Systems, 2005, 2005, p.587-590 Vol. 1

2005

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Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs

2008 Second International Conference on Secure System Integration and Reliability Improvement, 2008, p.16-23

2008

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Flexible and reconfigurable receiver architecture for WCDMA systems with low spreading factors

Electronics letters, 2005-01, Vol.41 (1), p.1-1

2005

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Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.640-645

2009

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An iterative reconfigurability approach for WCDMA high-data-rate communications

IEEE wireless communications, 2006-06, Vol.13 (3), p.8-14

2006

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CDMA2000 for a satellite environment

Proceedings of the 7th International Conference on Telecommunications, 2003. ConTEL 2003, 2003, Vol.2, p.469-473 vol.2

2003

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An efficient method for estimating the area of information propagation through electromagnetic radiation

2012 IEEE International Symposium on Electromagnetic Compatibility, 2012, p.800-805

2012

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Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques

2011 Design, Automation & Test in Europe, 2011, p.1-6

2011

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An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF

2012 15th Euromicro Conference on Digital System Design, 2012, p.156-162

2012

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Heterogeneous implementation of a rake receiver for DS-CDMA communication systems

2005 12th IEEE International Conference on Electronics, Circuits and Systems, 2005, p.1-4

2005

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Efficient FPGA implementation of Gaussian noise generator for communication channel emulation

ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445), 2000, Vol.1, p.366-369 vol.1

2000

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High-performance low-cost implementation of two-dimensional DCT processor nn FPGA

International Symposium on Field Programmable Gate Arrays: Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays; 21-23 Feb. 1999, 1999, p.249-249

1999

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Practical Setup Time Violation Attacks on AES

2008 Seventh European Dependable Computing Conference, 2008, p.91-96

2008

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Security evaluation of application-specific integrated circuits and field programmable gate arrays against setup time violation attacks

Hardware Trojan detection by delay and electromagnetic measurements

Generic Description and Synthesis of LDPC Decoders

High speed true random number generator based on open loop structures in FPGAs

Hardware trojan detection by delay and electromagnetic measurements

Flexible and reconfigurable receiver architecture for WCDMA systems with low spreading factors

Design of high speed AWGN communication channel emulator

RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs

A finger configuration algorithm for a reconfigurable Rake receiver

Analysis of Electromagnetic Information Leakage From Cryptographic Devices With Different Physical Structures

Integrating a QPSK Quantum Key Distribution Link

Efficient Evaluation of EM Radiation Associated With Information Leakage From Cryptographic Devices

Implementation of a digital receiver for DS-CDMA communication systems using HW/SW codesign

Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs

Flexible and reconfigurable receiver architecture for WCDMA systems with low spreading factors

Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints

An iterative reconfigurability approach for WCDMA high-data-rate communications

CDMA2000 for a satellite environment

An efficient method for estimating the area of information propagation through electromagnetic radiation

Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques

An Easy-to-Design PUF Based on a Single Oscillator: The Loop PUF

Heterogeneous implementation of a rake receiver for DS-CDMA communication systems

Efficient FPGA implementation of Gaussian noise generator for communication channel emulation

High-performance low-cost implementation of two-dimensional DCT processor nn FPGA

Practical Setup Time Violation Attacks on AES

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