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Germanium p-Channel FinFET Fabricated by Aspect Ratio Trapping

IEEE transactions on electron devices, 2014-02, Vol.61 (2), p.430-436

2014

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Germanium n-Channel Planar FET and FinFET: Gate-Stack and Contact Optimization

IEEE transactions on electron devices, 2015-11, Vol.62 (11), p.3567-3574

2015

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Investigation of Strain Engineering in FinFETs Comprising Experimental Analysis and Numerical Simulations

IEEE transactions on electron devices, 2011-06, Vol.58 (6), p.1583-1593

2011

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Evaluation of Transmission Line Model Structures for Silicide-to-Silicon Specific Contact Resistance Extraction

IEEE transactions on electron devices, 2008-05, Vol.55 (5), p.1170-1176

2008

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High-Performance InAs Gate-All-Around Nanowire MOSFETs on 300 mm Si Substrates

IEEE journal of the Electron Devices Society, 2016-09, Vol.4 (5), p.253-259

2016

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Atomically flat and uniform relaxed III–V epitaxial films on silicon substrate for heterogeneous and hybrid integration

Scientific reports, 2017-11, Vol.7 (1), p.14632-6, Article 14632

2017

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Germanium-based transistors for future high performance and low power logic applications

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.2.4.1-2.4.4

2015

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Ni based silicides for 45 nm CMOS and beyond

Materials science & engineering. B, Solid-state materials for advanced technology, 2004-12, Vol.114, p.29-41

2004

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Silicides for 65 nm CMOS and Beyond

MRS proceedings, 2003, Vol.765, Article D7.5

2003

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Ni fully silicided gates for 45 nm CMOS applications

Microelectronic engineering, 2005-12, Vol.82 (3), p.441-448

2005

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Effect of SIIS on work function of self-aligned PtSi FUSI metal-gated capacitors

IEEE transactions on electron devices, 2006-05, Vol.53 (5), p.1180-1185

2006

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Advanced PMOS Device Architecture for Highly-Doped Ultra-Shallow Junctions

Japanese Journal of Applied Physics, 2004-04, Vol.43 (4S), p.1778

2004

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Ion implantation for low-resistive source/drain contacts in FinFET devices

MRS proceedings, 2008, Vol.1070, Article 1070-E02-01

2008

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Status and Performance of Integration Modules Toward Scaled CMOS with Transition Metal Dichalcogenide Channel

2023 International Electron Devices Meeting (IEDM), 2023, p.1-4

2023

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Engineering Strain and Texture in Ferroelectric Scandium-Doped Aluminium Nitride

ACS applied electronic materials, 2023-02, Vol.5 (2), p.858-864

2023

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E-MRS Spring Meeting 2015 Symposium Z: Nanomaterials and processes for advanced semiconductor CMOS devices

Materials science in semiconductor processing, 2016-02, Vol.42, p.165-165

2016

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Application Of HCl Gas Phase Etch In The Production Of Novel Devices

ECS transactions, 2008-10, Vol.13 (1), p.329-335

2008

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Ni fully silicided gates for 45nm CMOS applications

Microelectronic engineering, 2005-12, Vol.82 (3-4), p.441-448

2005

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Applications of Ni-based silicides to 45 nm CMOS and Beyond

MRS proceedings, 2004, Vol.810, Article C2.1

2004

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Material Aspects and Challenges for SOI FinFET Integration

ECS transactions, 2008-10, Vol.13 (1), p.223-234

2008

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Advanced FinFET Devices for Sub-32nm Technology Nodes: Characteristics and Integration Challenges

ECS transactions, 2009-05, Vol.19 (4), p.45-54

2009

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Effects of Alloying on Properties of NiSi for CMOS Applications

MRS proceedings, 2004, Vol.810, Article C4.5

2004

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Ni Silicide Morphology On Small Features

MRS proceedings, 2004, Vol.810, Article C4.4

2004

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The Influence of TiN Thickness and \hbox Formation Method on the Structural and Electrical Properties of \hbox/ \hbox/\hbox Gate Stacks

IEEE transactions on electron devices, 2009-07, Vol.56 (7), p.1548-1553

2009

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The Influence of TiN Thickness and Si02 Formation Method on the Structural and Electrical Properties of TiN/HfO2/SiO2 Gate Stacks

IEEE transactions on electron devices, 2009, Vol.56 (7), p.1548-1553

2009

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Germanium p-Channel FinFET Fabricated by Aspect Ratio Trapping

Germanium n-Channel Planar FET and FinFET: Gate-Stack and Contact Optimization

Investigation of Strain Engineering in FinFETs Comprising Experimental Analysis and Numerical Simulations

Evaluation of Transmission Line Model Structures for Silicide-to-Silicon Specific Contact Resistance Extraction

High-Performance InAs Gate-All-Around Nanowire MOSFETs on 300 mm Si Substrates

Atomically flat and uniform relaxed III–V epitaxial films on silicon substrate for heterogeneous and hybrid integration

Germanium-based transistors for future high performance and low power logic applications

Ni based silicides for 45 nm CMOS and beyond

Silicides for 65 nm CMOS and Beyond

Ni fully silicided gates for 45 nm CMOS applications

Effect of SIIS on work function of self-aligned PtSi FUSI metal-gated capacitors

Advanced PMOS Device Architecture for Highly-Doped Ultra-Shallow Junctions

Ion implantation for low-resistive source/drain contacts in FinFET devices

Status and Performance of Integration Modules Toward Scaled CMOS with Transition Metal Dichalcogenide Channel

Engineering Strain and Texture in Ferroelectric Scandium-Doped Aluminium Nitride

E-MRS Spring Meeting 2015 Symposium Z: Nanomaterials and processes for advanced semiconductor CMOS devices

Application Of HCl Gas Phase Etch In The Production Of Novel Devices

Ni fully silicided gates for 45nm CMOS applications

Applications of Ni-based silicides to 45 nm CMOS and Beyond

Material Aspects and Challenges for SOI FinFET Integration

Advanced FinFET Devices for Sub-32nm Technology Nodes: Characteristics and Integration Challenges

Effects of Alloying on Properties of NiSi for CMOS Applications

Ni Silicide Morphology On Small Features

The Influence of TiN Thickness and \hbox Formation Method on the Structural and Electrical Properties of \hbox/ \hbox/\hbox Gate Stacks

The Influence of TiN Thickness and Si02 Formation Method on the Structural and Electrical Properties of TiN/HfO2/SiO2 Gate Stacks

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