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Associations of traffic-related air pollution and greenery with academic outcomes among primary schoolchildren

Environmental research, 2021-08, Vol.199, p.111325-111325, Article 111325

2021

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Vegetation and vehicle emissions around primary schools across urban Australia: associations with academic performance

Environmental research, 2022-09, Vol.212, p.113256-113256, Article 113256

2022

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Computer Hardware Description Languages and their Applications: Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications - CHDL '93 Sponsored by IFIP WG10.2 and in cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April, 1993

2014

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Misdiagnosis of CTX due to propofol: The interference of total intravenous propofol anaesthesia with bile acid profiling

Journal of inherited metabolic disease, 2020-07, Vol.43 (4), p.843-851

2020

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Adaptive memory architecture for real-time image warping

2012 IEEE 30th International Conference on Computer Design (ICCD), 2012, p.466-471

2012

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Computer Hardware Description Languages and Their Applications: Proceedings of the 11th IFIP WG10. 2 International Conference on Computer Hardware Description Languages and Their Applications - CHDL '93 Sponsored by IFIP WG10. 2 and in Cooperation with IEEE COMPSOC, Ottawa, Ontario, Canada, 26-28 April 1993

1, 1993

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Formally verified redundancy removal

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078), 1999, p.150-155

1999

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Higher Order Logic Theorem Proving and Its Applications: Proceedings of the IFIP TC10/WG10. 2 International Workshop on Higher Order Logic Theorem Proving and Its Applications - HOL '92 Leuven, Belgium, 21-24 September 1992

1, 1993

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A formal verification technique for embedded software

Proceedings International Conference on Computer Design. VLSI in Computers and Processors, 1996, p.352-357

1996

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A proof of the nonrestoring division algorithm and its implementation on an ALU

Formal methods in system design, 1994-01, Vol.4 (1), p.5-31

1994

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Incorporating local consistency information into the online signature verification process

International journal on document analysis and recognition, 1998-07, Vol.1 (2), p.110-115

1998

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Acceleration of relaxation-based circuit simulation using a multiprocessor system

IEEE transactions on computer-aided design of integrated circuits and systems, 1990-10, Vol.9 (10), p.1063-1072

1990

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An evaluation of different handwriting observation techniques from a signature verification point of view

Advances in Document Image Analysis, 2005, Vol.1339, p.273-282

2005

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On-line signature verification by dynamic time-warping

Proceedings of 13th International Conference on Pattern Recognition, 1996, Vol.3, p.38-42 vol.3

1996

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Static timing analysis of dynamically sensitizable paths

26th ACM/IEEE Design Automation Conference, 1989, p.568-573

1989

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Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system

IEEE journal of solid-state circuits, 1986-02, Vol.21 (1), p.73-85

1986

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A parallel method for functional verification of medium and high throughput DSP synthesis

Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1994, p.460-463

1994

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On the comparison of HOL and Boyer-Moore for formal hardware verification

Formal methods in system design, 1993-02, Vol.2 (1), p.45-72

1993

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Dynamic programming optimisation for on-line signature verification

Proceedings of the Fourth International Conference on Document Analysis and Recognition, 1997, Vol.2, p.653-656 vol.2

1997

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On-line signature verification: discrimination emphasised

Proceedings of the Fourth International Conference on Document Analysis and Recognition, 1997, Vol.2, p.657-660 vol.2

1997

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Symbolic multi-level verification of refinement

Proceedings Ninth Great Lakes Symposium on VLSI, 1999, p.288-291

1999

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Feedback loops and large subcircuits in the multiprocessor implementation of a relaxation based circuit simulator

26th ACM/IEEE Design Automation Conference, 1989, p.25-30

1989

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A symbolic core approach to the formal verification of integrated mixed-mode applications

European Design and Test Conference: Proceedings of the 1997 European conference on Design and Test; 17-20 Mar. 1997, 1997, p.432-432

1997

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Automated tracking of the mandibular canal in CBCT images using matching and multiple hypotheses methods

2012 Fourth International Conference on Communications and Electronics (ICCE), 2012, p.327-332

2012

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A symbolic core approach to the formal verification of integrated mixed-mode applications

Proceedings European Design and Test Conference. ED & TC 97, 1997, p.432-436

1997

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Associations of traffic-related air pollution and greenery with academic outcomes among primary schoolchildren

Vegetation and vehicle emissions around primary schools across urban Australia: associations with academic performance

Misdiagnosis of CTX due to propofol: The interference of total intravenous propofol anaesthesia with bile acid profiling

Adaptive memory architecture for real-time image warping

Formally verified redundancy removal

Higher Order Logic Theorem Proving and Its Applications: Proceedings of the IFIP TC10/WG10. 2 International Workshop on Higher Order Logic Theorem Proving and Its Applications - HOL '92 Leuven, Belgium, 21-24 September 1992

A formal verification technique for embedded software

A proof of the nonrestoring division algorithm and its implementation on an ALU

Incorporating local consistency information into the online signature verification process

Acceleration of relaxation-based circuit simulation using a multiprocessor system

An evaluation of different handwriting observation techniques from a signature verification point of view

On-line signature verification by dynamic time-warping

Static timing analysis of dynamically sensitizable paths

Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system

A parallel method for functional verification of medium and high throughput DSP synthesis

On the comparison of HOL and Boyer-Moore for formal hardware verification

Dynamic programming optimisation for on-line signature verification

On-line signature verification: discrimination emphasised

Symbolic multi-level verification of refinement

Feedback loops and large subcircuits in the multiprocessor implementation of a relaxation based circuit simulator

A symbolic core approach to the formal verification of integrated mixed-mode applications

Automated tracking of the mandibular canal in CBCT images using matching and multiple hypotheses methods

A symbolic core approach to the formal verification of integrated mixed-mode applications

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