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A Wide-Range Level Shifter Using a Modified Wilson Current Mirror Hybrid Buffer

IEEE transactions on circuits and systems. I, Regular papers, 2014-06, Vol.61 (6), p.1656-1665

2014

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40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist

IEEE transactions on circuits and systems. I, Regular papers, 2014-09, Vol.61 (9), p.2578-2585

2014

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Essential factors that affect bioelectricity generation by Rhodopseudomonas palustris strain PS3 in paddy soil microbial fuel cells

International journal of energy research, 2021-02, Vol.45 (2), p.2231-2244

2021

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Self-Sustaining Soil Electrical Conductance Measurement Using a DC-DC Power Converter

IEEE sensors journal, 2019-11, Vol.19 (22), p.10560-10567

2019

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A Sustainable Soil Energy Harvesting System With Wide-Range Power-Tracking Architecture

IEEE internet of things journal, 2019-10, Vol.6 (5), p.8384-8392

2019

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An Adaptive Pulse-Triggered Flip-Flop for a High-Speed and Voltage-Scalable Standard Cell Library

IEEE transactions on circuits and systems. II, Express briefs, 2013-10, Vol.60 (10), p.677-681

2013

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A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications

IEICE transactions on electronics, 2015-08, Vol.E98.C (8), p.882-891

2015

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A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques

IEICE transactions on electronics, 2016-04, Vol.E99.C (4), p.481-490

2016

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Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells

IEEE transactions on circuits and systems. II, Express briefs, 2014-12, Vol.61 (12), p.947-951

2014

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Invited: Wireless sensor nodes for environmental monitoring in Internet of Things

2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 2016, p.1-5

2016

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An all-digital power management unit with 90% power efficiency and ns-order voltage transition time for DVS operation in low power sensing SoC applications

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.1370-1373

2015

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A Large σVTH/VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differential Sensing and Fast Write-Back Scheme

IEEE journal of solid-state circuits, 2011, Vol.46 (4), p.815-827

2011

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A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2013, p.158-159

2013

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An ultra-low voltage hearing aid chip using variable-latency design technique

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.2543-2546

2014

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A radio-controlled receiver for clocks/watches and alarm applications

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.2672-2675

2014

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An ultra-low power interface CMOS IC design for biosensor applications

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), 2012, p.1196-1199

2012

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A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-V Read-Port, and Offset Cell VDD Biasing Techniques

IEEE journal of solid-state circuits, 2013-10, Vol.48 (10), p.2558-2569

2013

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A Large \sigma V /VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differential Sensing and Fast Write-Back Scheme

IEEE journal of solid-state circuits, 2011-04, Vol.46 (4), p.815-827

2011

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Parallel Architecture Core (PAC)—the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools

Journal of signal processing systems, 2011-03, Vol.62 (3), p.373-382

2011

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Low-power FIR filter realization with differential coefficients and inputs

IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 2000-02, Vol.47 (2), p.137-145

2000

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Multiple output switched capacitor DC-DC converter with capacitor sharing for sensor-fusion platforms

2016 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2016, p.1-4

2016

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Thermoelectric energy harvesting with 1mV low input voltage and 390nA quiescent current for 99.6% maximum power point tracking

2012 Proceedings of the ESSCIRC (ESSCIRC), 2012, p.105-108

2012

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A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010, p.266-267

2010

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Batteryless 275mV startup single-cell photovoltaic energy harvesting system for alleviating shading effect

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2013, p.265-268

2013

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Overview of ITRI PAC project - from VLIW DSP processor to multicore computing platform

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2008, p.188-191

2008

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A Wide-Range Level Shifter Using a Modified Wilson Current Mirror Hybrid Buffer

40 nm Bit-Interleaving 12T Subthreshold SRAM With Data-Aware Write-Assist

Essential factors that affect bioelectricity generation by Rhodopseudomonas palustris strain PS3 in paddy soil microbial fuel cells

Self-Sustaining Soil Electrical Conductance Measurement Using a DC-DC Power Converter

A Sustainable Soil Energy Harvesting System With Wide-Range Power-Tracking Architecture

An Adaptive Pulse-Triggered Flip-Flop for a High-Speed and Voltage-Scalable Standard Cell Library

A Near-Threshold Cell-Based All-Digital PLL with Hierarchical Band-Selection G-DCO for Fast Lock-In and Low-Power Applications

A Varactor-Based All-Digital Multi-Phase PLL with Random-Sampling Spur Suppression Techniques

Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells

Invited: Wireless sensor nodes for environmental monitoring in Internet of Things

An all-digital power management unit with 90% power efficiency and ns-order voltage transition time for DVS operation in low power sensing SoC applications

A Large σVTH/VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differential Sensing and Fast Write-Back Scheme

A 0.48V 0.57nJ/pixel video-recording SoC in 65nm CMOS

An ultra-low voltage hearing aid chip using variable-latency design technique

A radio-controlled receiver for clocks/watches and alarm applications

An ultra-low power interface CMOS IC design for biosensor applications

A Sub-0.3 V Area-Efficient L-Shaped 7T SRAM With Read Bitline Swing Expansion Schemes Based on Boosted Read-Bitline, Asymmetric-V Read-Port, and Offset Cell VDD Biasing Techniques

A Large \sigma V /VDD Tolerant Zigzag 8T SRAM With Area-Efficient Decoupled Differential Sensing and Fast Write-Back Scheme

Parallel Architecture Core (PAC)—the First Multicore Application Processor SoC in Taiwan Part I: Hardware Architecture & Software Development Tools

Low-power FIR filter realization with differential coefficients and inputs

Multiple output switched capacitor DC-DC converter with capacitor sharing for sensor-fusion platforms

Thermoelectric energy harvesting with 1mV low input voltage and 390nA quiescent current for 99.6% maximum power point tracking

A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications

Batteryless 275mV startup single-cell photovoltaic energy harvesting system for alleviating shading effect

Overview of ITRI PAC project - from VLIW DSP processor to multicore computing platform

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